forked from OSchip/llvm-project
76 lines
1.6 KiB
LLVM
76 lines
1.6 KiB
LLVM
; RUN: llc < %s -march=xcore | FileCheck %s
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%0 = type { i32, i32 }
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declare i32 @llvm.xcore.bitrev(i32)
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declare i32 @llvm.xcore.crc32(i32, i32, i32)
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declare %0 @llvm.xcore.crc8(i32, i32, i32)
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declare i32 @llvm.xcore.zext(i32, i32)
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declare i32 @llvm.xcore.sext(i32, i32)
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declare i32 @llvm.xcore.geted()
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declare i32 @llvm.xcore.getet()
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define i32 @bitrev(i32 %val) {
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; CHECK: bitrev:
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; CHECK: bitrev r0, r0
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%result = call i32 @llvm.xcore.bitrev(i32 %val)
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ret i32 %result
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}
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define i32 @crc32(i32 %crc, i32 %data, i32 %poly) {
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; CHECK: crc32:
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; CHECK: crc32 r0, r1, r2
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%result = call i32 @llvm.xcore.crc32(i32 %crc, i32 %data, i32 %poly)
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ret i32 %result
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}
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define %0 @crc8(i32 %crc, i32 %data, i32 %poly) {
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; CHECK: crc8:
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; CHECK: crc8 r0, r1, r1, r2
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%result = call %0 @llvm.xcore.crc8(i32 %crc, i32 %data, i32 %poly)
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ret %0 %result
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}
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define i32 @zext(i32 %a, i32 %b) {
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; CHECK: zext:
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; CHECK: zext r0, r1
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%result = call i32 @llvm.xcore.zext(i32 %a, i32 %b)
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ret i32 %result
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}
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define i32 @zexti(i32 %a) {
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; CHECK: zexti:
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; CHECK: zext r0, 4
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%result = call i32 @llvm.xcore.zext(i32 %a, i32 4)
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ret i32 %result
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}
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define i32 @sext(i32 %a, i32 %b) {
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; CHECK: sext:
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; CHECK: sext r0, r1
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%result = call i32 @llvm.xcore.sext(i32 %a, i32 %b)
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ret i32 %result
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}
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define i32 @sexti(i32 %a) {
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; CHECK: sexti:
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; CHECK: sext r0, 4
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%result = call i32 @llvm.xcore.sext(i32 %a, i32 4)
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ret i32 %result
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}
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define i32 @geted() {
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; CHECK: geted:
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; CHECK: get r11, ed
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; CHECK-NEXT: mov r0, r11
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%result = call i32 @llvm.xcore.geted()
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ret i32 %result
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}
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define i32 @getet() {
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; CHECK: getet:
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; CHECK: get r11, et
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; CHECK-NEXT: mov r0, r11
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%result = call i32 @llvm.xcore.getet()
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ret i32 %result
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}
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