forked from OSchip/llvm-project
fb9c5c3dce
This patch is a followup patch to https://reviews.llvm.org/D105760 which adds this relocation. This handles the relocation in lld. The s_branch family of instruction does the following: PC = PC + signext(simm * 4) + 4 so we we do the opposite on the target address before writing it in the instruction stream. Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D105761 |
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| .. | ||
| AArch64.cpp | ||
| AMDGPU.cpp | ||
| ARM.cpp | ||
| AVR.cpp | ||
| Hexagon.cpp | ||
| MSP430.cpp | ||
| Mips.cpp | ||
| MipsArchTree.cpp | ||
| PPC.cpp | ||
| PPC64.cpp | ||
| PPCInsns.def | ||
| RISCV.cpp | ||
| SPARCV9.cpp | ||
| X86.cpp | ||
| X86_64.cpp | ||