llvm-project/llvm/test/MC/X86
Craig Topper 391d5caa10 [X86] Move the 2 byte VEX optimization for MOV instructions back to the X86AsmParser::processInstruction where it used to be. Block when {vex3} prefix is present.
Years ago I moved this to an InstAlias using VR128H/VR128L. But now that we support {vex3} pseudo prefix, we need to block the optimization when it is set to match gas behavior.

llvm-svn: 358046
2019-04-10 05:43:20 +00:00
..
AlignedBundling [MC] Pass MCSubtargetInfo to fixupNeedsRelaxation and applyFixup 2018-06-06 09:40:06 +00:00
Inputs
3DNow.s
2011-09-06-NoNewline.s
AES-32.s
AES-64.s
AVX-32.s [X86] Add support for {vex2}, {vex3}, and {evex} to the assembler to match gas. Use {evex} to improve the one our 32-bit AVX512 tests. 2019-04-09 18:45:15 +00:00
AVX-64.s
AVX2-32.s
AVX2-64.s
AVX512F_512-32.s [X86] Move the 'vmovq.s' and similar assembly strings for EVEX vector moves with reversed operands to InstAliases. 2018-06-18 01:28:05 +00:00
AVX512F_512-64.s [X86] Move the 'vmovq.s' and similar assembly strings for EVEX vector moves with reversed operands to InstAliases. 2018-06-18 01:28:05 +00:00
AVX512F_SCALAR-32.s [X86] Add support for {vex2}, {vex3}, and {evex} to the assembler to match gas. Use {evex} to improve the one our 32-bit AVX512 tests. 2019-04-09 18:45:15 +00:00
AVX512F_SCALAR-64.s [X86] Support the EVEX versions vcvt(t)ss2si and vcvt(t)sd2si with the {evex} pseudo prefix in the assembler. 2019-04-10 01:29:59 +00:00
AVXAES-32.s
AVXAES-64.s
BMI1-32.s
BMI1-64.s
BMI2-32.s
BMI2-64.s
CET-32.s
CET-64.s
CLFLUSHOPT-32.s
CLFLUSHOPT-64.s
CLFSH-32.s
CLFSH-64.s
CLWB-32.s
CLWB-64.s
CLZERO-32.s
CLZERO-64.s
F16C-32.s
F16C-64.s
FMA-32.s
FMA-64.s
FXSAVE-32.s
FXSAVE-64.s
FXSAVE64-64.s
I86-32.s [X86] Add coverage for 16-bit and 64-bit versions of bsf/bsr/bt/btc/btr/bts in the assembly tests that are supposed to provide full coverage. Add coverage for cwtl/cltq/cwtd/cqto as well. 2019-03-18 22:06:19 +00:00
I86-64.s [X86] Add coverage for 16-bit and 64-bit versions of bsf/bsr/bt/btc/btr/bts in the assembly tests that are supposed to provide full coverage. Add coverage for cwtl/cltq/cwtd/cqto as well. 2019-03-18 22:06:19 +00:00
I186-32.s
I186-64.s
I286-32.s [X86] Remove SLDT64m instruction. 2018-04-29 04:50:53 +00:00
I286-64.s [X86] Remove SLDT64m instruction. 2018-04-29 04:50:53 +00:00
I386-32.s [X86] Add coverage for 16-bit and 64-bit versions of bsf/bsr/bt/btc/btr/bts in the assembly tests that are supposed to provide full coverage. Add coverage for cwtl/cltq/cwtd/cqto as well. 2019-03-18 22:06:19 +00:00
I386-64.s [X86] Add coverage for 16-bit and 64-bit versions of bsf/bsr/bt/btc/btr/bts in the assembly tests that are supposed to provide full coverage. Add coverage for cwtl/cltq/cwtd/cqto as well. 2019-03-18 22:06:19 +00:00
I486-32.s
I486-64.s
INVPCID-32.s
INVPCID-64.s
LWP-32.s [X86] Adding full coverage of MC encoding for the XOP and LWP ISAs. 2019-01-02 18:09:41 +00:00
LWP-64.s [X86] Adding full coverage of MC encoding for the XOP and LWP ISAs. 2019-01-02 18:09:41 +00:00
MMX-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
MMX-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
PKU-32.s
PKU-64.s
POPCNT-32.s
POPCNT-64.s
PPRO-32.s [X86] Print %st(0) as %st when its implicit to the instruction. Continue printing it as %st(0) when its encoded in the instruction. 2019-02-04 04:15:10 +00:00
PPRO-64.s [X86] Print %st(0) as %st when its implicit to the instruction. Continue printing it as %st(0) when its encoded in the instruction. 2019-02-04 04:15:10 +00:00
PREFETCH-32.s
PREFETCH-64.s
RDPMC-32.s
RDPMC-64.s
RDRAND-32.s
RDRAND-64.s
RDSEED-32.s
RDSEED-64.s
RDTSCP-32.s
RDTSCP-64.s
RDWRFSGS-64.s
RTM.s
SHA-32.s
SHA-64.s
SSE-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE2-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE2-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE3-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE3-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE4a-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE4a-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE41-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE41-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE42-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE42-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSEMXCSR-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSEMXCSR-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE_PREFETCH-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE_PREFETCH-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSSE3-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSSE3-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SVM-32.s
SVM-64.s
VMFUNC-32.s
VMFUNC-64.s
VTX-32.s
VTX-64.s
X86_64-pku.s
X87-32.s [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
X87-64.s [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
XOP-32.s [X86] Adding full coverage of MC encoding for the XOP and LWP ISAs. 2019-01-02 18:09:41 +00:00
XOP-64.s [X86] Adding full coverage of MC encoding for the XOP and LWP ISAs. 2019-01-02 18:09:41 +00:00
XSAVE-32.s
XSAVE-64.s
XSAVEC-32.s
XSAVEC-64.s
XSAVEOPT-32.s
XSAVEOPT-64.s
XSAVES-32.s
XSAVES-64.s
abs8.s Implemented sane default for llvm-objdump's relocation Value format 2018-06-01 05:31:58 +00:00
address-size.s [X86] Don't accept (%si,%bp) 16-bit address expressions. 2018-06-22 20:20:38 +00:00
avx512-encodings.s [X86] Remove the _alt forms of AVX512 VPCMP instructions. Use a combination of custom printing and custom parsing to achieve the same result and more 2019-03-17 21:21:40 +00:00
avx512-err.s X86AsmParser AVX-512: Return error instead of hitting assert 2019-02-19 17:13:40 +00:00
avx512bitalg-encoding.s
avx512bw-encoding.s
avx512gfni-encoding.s
avx512ifma-encoding.s
avx512ifmavl-encoding.s
avx512vaes-encoding.s
avx512vbmi-encoding.s
avx512vbmi2-encoding.s
avx512vbmi2vl-encoding.s
avx512vl-encoding.s
avx512vl_bitalg-encoding.s
avx512vl_gfni-encoding.s
avx512vl_vaes-encoding.s
avx512vl_vnni-encoding.s
avx512vlvpclmul.s
avx512vnni-encoding.s
avx512vpclmul.s
avx5124fmaps-encoding.s [X86] Add encoding tests for avx5124fmaps and avx5124vnni instructions. 2018-06-11 06:22:41 +00:00
avx5124vnniw-encoding.s [X86] Add encoding tests for avx5124fmaps and avx5124vnni instructions. 2018-06-11 06:22:41 +00:00
avx_vaes-encoding.s
cet-encoding.s
cfi-open-within-another-crash.s [MC][DWARF][AsmParser] Ensure nested CFI frames are diagnosed. 2018-10-19 12:14:30 +00:00
cfi-scope-errors.s [MC][DWARF][AsmParser] Ensure nested CFI frames are diagnosed. 2018-10-19 12:14:30 +00:00
cfi-scope-unclosed.s
cfi_def_cfa-crash.s
check-end-of-data-region.s
code16gcc.s
compact-unwind.s [X86][Darwin] Emit compact-unwind for register-sized stack adjustments 2019-01-08 13:53:15 +00:00
crlf.test
data-prefix-fail.s [X86] Remove DATA32_PREFIX. Hack the printing for DATA16_PREFIX to print 'data32' in 16-bit mode. Hack the asm parser to convert 'data32' to 'data16' in 16-bit mode. 2018-04-22 00:52:02 +00:00
data-prefix16.s
data-prefix32.s
data-prefix64.s
disassemble-zeroes.s [llvm-objdump] - Implement -z/--disassemble-zeroes. 2019-01-10 14:55:26 +00:00
dwarf-size-field-overflow.test [DwarfDebug] Add triple to test. 2019-03-19 21:18:59 +00:00
encoder-fail.s
error-reloc.s
eval-fill.s
expand-var.s
faultmap-section-parsing.s
fde-reloc.s
fixup-cpu-mode.s
fp-setup-macho.s
gather.s
gfni-encoding.s
gnux32-dwarf-gen.s
hex-immediates.s
i386-darwin-frame-register.ll
imm-comments.s
index-operations.s
inline-asm-obj.ll
intel-syntax-2.s [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
intel-syntax-32.s [X86] Don't accept (%si,%bp) 16-bit address expressions. 2018-06-22 20:20:38 +00:00
intel-syntax-ambiguous.s
intel-syntax-avx512-error.s
intel-syntax-avx512.s
intel-syntax-bitwise-ops.s
intel-syntax-directional-label.s
intel-syntax-encoding.s X86: add alias for pushfw/popfw in Intel mode 2018-10-22 20:38:13 +00:00
intel-syntax-error.s [X86][AsmParser] Keep track of whether an explicit scale was specified while parsing an address in Intel syntax. Use it for improved error checking. 2018-06-22 22:28:39 +00:00
intel-syntax-hex.s [MC] Separate masm integer literal lexer support from inline asm 2018-10-24 20:23:57 +00:00
intel-syntax-invalid-basereg.s
intel-syntax-invalid-scale.s
intel-syntax-print.ll
intel-syntax-ptr-sized.s [X86] Add suffixes to the LGDT/LIDT/SGDT/SIDT mnemonics in Intel syntax. Add aliases based on 16/32-bit mode to choose the default. 2018-04-29 06:24:09 +00:00
intel-syntax-unsized-memory.s
intel-syntax-var-offset.ll
intel-syntax-x86-64-avx.s
intel-syntax-x86-64-avx512f_vl.s
intel-syntax-x86-avx512dq_vl.s
intel-syntax-x86-avx512vbmi_vl.s
intel-syntax.s [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
invalid-sleb.s
invalid_opcode.s
large-bss.s
line-table-sections.s
lit.local.cfg
lwp-x86_64.s
lwp.s
macho-reloc-errors-x86.s
macho-reloc-errors-x86_64.s
macho-uleb.s
mpx-encodings.s [X86] Remove REX.W from 64-bit mode BND instructions. 2018-04-28 06:02:40 +00:00
no-elf-compact-unwind.s
padlock.s
pr22004.s
pr22028.s
pr27884.s [MC] Separate masm integer literal lexer support from inline asm 2018-10-24 20:23:57 +00:00
pr28547.s
pr37425.s [MC][X86] Enhance X86 Register expression handling to more closely match GCC. 2018-08-16 16:31:14 +00:00
pr38826.s [X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives. 2018-09-06 02:03:14 +00:00
relax-insn.s
reloc-bss.s
reloc-directive.s
reloc-macho.s
reloc-undef-global.s
ret.s
return-column.s Move some llvm-mc tests where they belong 2019-02-05 20:12:48 +00:00
shuffle-comments.s
signed-coff-pcrel.s
space-err.s
stackmap-nops.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
unused_reg_var_assign.s [MC] Teach ELFObjectWriter that parse-time variables do not appear in 2019-03-04 19:12:56 +00:00
validate-inst-att.s
validate-inst-intel.s
variant-diagnostics.s
vpclmulqdq.s
x86-16.s [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
x86-32-avx.s [X86] Remove the _alt forms of (V)CMP instructions. Use a combination of custom printing and custom parsing to achieve the same result and more 2019-03-18 17:59:59 +00:00
x86-32-coverage.s [X86] Enable printAliasInstr for the Intel assembly printer so that AAM and AAD will print without an immediate when the immediate is 10. 2019-03-13 00:43:03 +00:00
x86-32-fma3.s
x86-32-ms-inline-asm.s
x86-32.s [X86] Remove the _alt forms of (V)CMP instructions. Use a combination of custom printing and custom parsing to achieve the same result and more 2019-03-18 17:59:59 +00:00
x86-64-avx512bw.s [X86] Add '.s' aliases to the assembler for the various redundant move encodings to match gas and our EVEX instructions. 2018-06-18 05:00:50 +00:00
x86-64-avx512bw_vl.s [X86] Move the 'vmovq.s' and similar assembly strings for EVEX vector moves with reversed operands to InstAliases. 2018-06-18 01:28:05 +00:00
x86-64-avx512cd.s
x86-64-avx512cd_vl.s
x86-64-avx512dq.s
x86-64-avx512dq_vl.s
x86-64-avx512f_vl.s [X86] Move the 'vmovq.s' and similar assembly strings for EVEX vector moves with reversed operands to InstAliases. 2018-06-18 01:28:05 +00:00
x86-64-avx512vpopcntdq.s
x86-64.s [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
x86-GCC-inline-asm-Y-constraints.ll
x86-branch-relaxation.s
x86-evenDirective.s
x86-itanium.ll
x86-target-directives.s
x86-windows-itanium-libcalls.ll
x86_64-asm-match.s Move `REQUIRES:` line to the top 2018-06-26 17:44:23 +00:00
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s [X86] Move the 2 byte VEX optimization for MOV instructions back to the X86AsmParser::processInstruction where it used to be. Block when {vex3} prefix is present. 2019-04-10 05:43:20 +00:00
x86_64-bmi-encoding.s
x86_64-encoding.s [X86] Make %eiz usage in 64-bit mode, force a 0x67 address size prefix. Fix some test CHECK lines. 2018-06-23 06:15:04 +00:00
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-hle-encoding.s
x86_64-imm-widths.s
x86_64-rand-encoding.s
x86_64-rtm-encoding.s
x86_64-signed-reloc.s
x86_64-sse4a.s
x86_64-tbm-encoding.s
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s [X86] Add support for {vex2}, {vex3}, and {evex} to the assembler to match gas. Use {evex} to improve the one our 32-bit AVX512 tests. 2019-04-09 18:45:15 +00:00
x86_long_nop.s
x86_nop.s
x86_operands.s X86AsmParser: Do not process a non-existent token 2019-03-26 03:12:41 +00:00