forked from OSchip/llvm-project
152 lines
6.7 KiB
LLVM
152 lines
6.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
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define <4 x float> @test_rsqrt14_ss(<4 x float> %a0) {
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; CHECK-LABEL: test_rsqrt14_ss:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vrsqrt14ss %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: retq
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%res = call <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ;
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ret <4 x float> %res
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}
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define <4 x float> @test_rsqrt14_ss_load(<4 x float> %a0, <4 x float>* %a1ptr) {
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; CHECK-LABEL: test_rsqrt14_ss_load:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vrsqrt14ss (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%a1 = load <4 x float>, <4 x float>* %a1ptr
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%res = call <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1) ;
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone
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define <4 x float> @test_rcp14_ss(<4 x float> %a0) {
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; CHECK-LABEL: test_rcp14_ss:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vrcp14ss %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: retq
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%res = call <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ;
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ret <4 x float> %res
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}
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define <4 x float> @test_rcp14_ss_load(<4 x float> %a0, <4 x float>* %a1ptr) {
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; CHECK-LABEL: test_rcp14_ss_load:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vrcp14ss (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%a1 = load <4 x float>, <4 x float>* %a1ptr
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%res = call <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1) ;
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone
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define <2 x double> @test_rsqrt14_sd(<2 x double> %a0) {
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; CHECK-LABEL: test_rsqrt14_sd:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vrsqrt14sd %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: retq
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%res = call <2 x double> @llvm.x86.avx512.rsqrt14.sd(<2 x double> %a0, <2 x double> %a0, <2 x double> zeroinitializer, i8 -1) ;
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ret <2 x double> %res
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}
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define <2 x double> @test_rsqrt14_sd_load(<2 x double> %a0, <2 x double>* %a1ptr) {
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; CHECK-LABEL: test_rsqrt14_sd_load:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vrsqrt14sd (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%a1 = load <2 x double>, <2 x double>* %a1ptr
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%res = call <2 x double> @llvm.x86.avx512.rsqrt14.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1) ;
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.avx512.rsqrt14.sd(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone
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define <2 x double> @test_rcp14_sd(<2 x double> %a0) {
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; CHECK-LABEL: test_rcp14_sd:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vrcp14sd %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: retq
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%res = call <2 x double> @llvm.x86.avx512.rcp14.sd(<2 x double> %a0, <2 x double> %a0, <2 x double> zeroinitializer, i8 -1) ;
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ret <2 x double> %res
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}
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define <2 x double> @test_rcp14_sd_load(<2 x double> %a0, <2 x double>* %a1ptr) {
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; CHECK-LABEL: test_rcp14_sd_load:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vrcp14sd (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%a1 = load <2 x double>, <2 x double>* %a1ptr
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%res = call <2 x double> @llvm.x86.avx512.rcp14.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1) ;
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.avx512.rcp14.sd(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone
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declare <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float>, <4 x float>,<4 x float>, i8, i32)
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define <4 x float>@test_int_x86_avx512_mask_scalef_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4) {
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; SKX-LABEL: test_int_x86_avx512_mask_scalef_ss:
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; SKX: ## %bb.0:
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; SKX-NEXT: kmovd %edi, %k1
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; SKX-NEXT: vscalefss %xmm1, %xmm0, %xmm2 {%k1}
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; SKX-NEXT: vscalefss {rn-sae}, %xmm1, %xmm0, %xmm0
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; SKX-NEXT: vaddps %xmm0, %xmm2, %xmm0
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; SKX-NEXT: retq
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;
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; KNL-LABEL: test_int_x86_avx512_mask_scalef_ss:
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; KNL: ## %bb.0:
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; KNL-NEXT: kmovw %edi, %k1
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; KNL-NEXT: vscalefss %xmm1, %xmm0, %xmm2 {%k1}
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; KNL-NEXT: vscalefss {rn-sae}, %xmm1, %xmm0, %xmm0
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; KNL-NEXT: vaddps %xmm0, %xmm2, %xmm0
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; KNL-NEXT: retq
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%res = call <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4, i32 4)
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%res1 = call <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 -1, i32 8)
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%res2 = fadd <4 x float> %res, %res1
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ret <4 x float> %res2
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}
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define <4 x float>@test_int_x86_avx512_mask_scalef_ss_load(<4 x float> %x0, <4 x float>* %x1ptr) {
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; CHECK-LABEL: test_int_x86_avx512_mask_scalef_ss_load:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vscalefss (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%x1 = load <4 x float>, <4 x float>* %x1ptr
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%res = call <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> undef, i8 -1, i32 4)
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ret <4 x float> %res
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}
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declare <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double>, <2 x double>,<2 x double>, i8, i32)
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define <2 x double>@test_int_x86_avx512_mask_scalef_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 %x4) {
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; SKX-LABEL: test_int_x86_avx512_mask_scalef_sd:
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; SKX: ## %bb.0:
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; SKX-NEXT: kmovd %edi, %k1
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; SKX-NEXT: vscalefsd %xmm1, %xmm0, %xmm2 {%k1}
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; SKX-NEXT: vscalefsd {rn-sae}, %xmm1, %xmm0, %xmm0
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; SKX-NEXT: vaddpd %xmm0, %xmm2, %xmm0
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; SKX-NEXT: retq
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;
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; KNL-LABEL: test_int_x86_avx512_mask_scalef_sd:
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; KNL: ## %bb.0:
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; KNL-NEXT: kmovw %edi, %k1
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; KNL-NEXT: vscalefsd %xmm1, %xmm0, %xmm2 {%k1}
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; KNL-NEXT: vscalefsd {rn-sae}, %xmm1, %xmm0, %xmm0
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; KNL-NEXT: vaddpd %xmm0, %xmm2, %xmm0
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; KNL-NEXT: retq
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%res = call <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 %x4, i32 4)
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%res1 = call <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 -1, i32 8)
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%res2 = fadd <2 x double> %res, %res1
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ret <2 x double> %res2
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}
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define <2 x double>@test_int_x86_avx512_mask_scalef_sd_load(<2 x double> %x0, <2 x double>* %x1ptr) {
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; CHECK-LABEL: test_int_x86_avx512_mask_scalef_sd_load:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vscalefsd (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%x1 = load <2 x double>, <2 x double>* %x1ptr
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%res = call <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> undef, i8 -1, i32 4)
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ret <2 x double> %res
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}
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