forked from OSchip/llvm-project
24 lines
785 B
LLVM
24 lines
785 B
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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; RUN: llc -march=mips -mcpu=mips32r6 -mattr=micromips -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=MMR6
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@j = global i32 5, align 4
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@k = global i32 10, align 4
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@l = global i32 20, align 4
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@m = global i32 10, align 4
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@r1 = common global i32 0, align 4
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@r2 = common global i32 0, align 4
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@r3 = common global i32 0, align 4
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define void @test() nounwind {
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entry:
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%0 = load i32, i32* @j, align 4
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%1 = load i32, i32* @k, align 4
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%cmp = icmp ult i32 %0, %1
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%conv = zext i1 %cmp to i32
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store i32 %conv, i32* @r1, align 4
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; 16: sltu ${{[0-9]+}}, ${{[0-9]+}}
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; MMR6: sltu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
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; 16: move ${{[0-9]+}}, $24
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ret void
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}
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