forked from OSchip/llvm-project
27 lines
949 B
LLVM
27 lines
949 B
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv5 -enable-hexagon-ieee-rnd-near < %s | FileCheck %s
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; Check that we generate conversion from double precision floating point
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; to 32-bit int value in IEEE rounding to the nearest mode in V5.
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; CHECK: r{{[0-9]+}} = convert_df2w(r{{[0-9]+}}:{{[0-9]+}})
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define i32 @main() nounwind {
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entry:
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%retval = alloca i32, align 4
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%i = alloca i32, align 4
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%a = alloca double, align 8
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%b = alloca double, align 8
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%c = alloca double, align 8
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store i32 0, i32* %retval
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store volatile double 1.540000e+01, double* %a, align 8
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store volatile double 9.100000e+00, double* %b, align 8
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%0 = load volatile double, double* %a, align 8
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%1 = load volatile double, double* %b, align 8
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%add = fadd double %0, %1
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store double %add, double* %c, align 8
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%2 = load double, double* %c, align 8
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%conv = fptosi double %2 to i32
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store i32 %conv, i32* %i, align 4
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%3 = load i32, i32* %i, align 4
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ret i32 %3
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}
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