llvm-project/llvm/test/CodeGen
Simon Pilgrim db0ed7d724 [X86][AVX] createPSADBW - support 256-bit cases on AVX1 via SplitBinaryOpsAndApply
llvm-svn: 326104
2018-02-26 18:17:25 +00:00
..
AArch64 [CodeGen] Don't omit any redundant information in -debug output 2018-02-26 15:23:42 +00:00
AMDGPU AMDGPU/GlobalISel: Make f64 constants legal 2018-02-26 17:20:43 +00:00
ARC
ARM [CodeGen] Don't omit any redundant information in -debug output 2018-02-26 15:23:42 +00:00
AVR [CodeGen] Unify the syntax of MBB successors in MIR and -debug output 2018-02-09 00:10:31 +00:00
BPF bpf: New codegen testcases for 32-bit subregister support 2018-02-23 23:49:33 +00:00
Generic [DebugInfo] Add remaining files to r325970 2018-02-23 23:13:18 +00:00
Hexagon [CodeGen] Don't omit any redundant information in -debug output 2018-02-26 15:23:42 +00:00
Inputs
Lanai Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
MIR [GISel]: Verify COPIES involving generic registers. 2018-02-09 01:27:23 +00:00
MSP430 Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
Mips [MIPS GlobalISel] Adding GlobalISel 2018-02-23 11:06:40 +00:00
NVPTX [DAGCombiner] Call ExtendUsesToFormExtLoad in (zext (and (load)))->(and (zextload)) even when the and does not have multiple uses 2018-02-15 20:20:32 +00:00
Nios2 [Nios2] Arithmetic instructions for R1 and R2 ISA. 2018-01-09 11:15:08 +00:00
PowerPC [CodeGen] Don't omit any redundant information in -debug output 2018-02-26 15:23:42 +00:00
RISCV [RISCV] Revert r324172 now r323991 was reverted 2018-02-17 18:17:47 +00:00
SPARC [Sparc] Return true in enableMultipleCopyHints(). 2018-02-24 08:24:31 +00:00
SystemZ [SystemZ] Also update the CHECK line for VPDI 2018-02-23 13:22:46 +00:00
Thumb [ARM] Fix issue with large xor constants. 2018-02-22 09:38:57 +00:00
Thumb2 [ARM] Return true in enableMultipleCopyHints(). 2018-02-16 09:51:01 +00:00
WebAssembly [WebAssembly] Add mechanisms for specifying an explicit import module name. 2018-02-09 23:13:22 +00:00
WinCFGuard Reland "Emit Function IDs table for Control Flow Guard" 2018-01-09 23:49:30 +00:00
WinEH
X86 [X86][AVX] createPSADBW - support 256-bit cases on AVX1 via SplitBinaryOpsAndApply 2018-02-26 18:17:25 +00:00
XCore [XCore] Return true in enableMultipleCopyHints(). 2018-02-26 08:03:32 +00:00