Andrea Di Biagio 6d9b9e125d [X86] Add target combine rule to select ADDSUB instructions from a build_vector ... This patch teaches the backend how to combine a build_vector that implements an 'addsub' between packed float vectors into a sequence of vector add and vector sub followed by a VSELECT. The new VSELECT is expected to be lowered into a BLENDI. At ISel stage, the sequence 'vector add + vector sub + BLENDI' is pattern-matched against ISel patterns added at r211427 to select 'addsub' instructions. Added three more ISel patterns for ADDSUB. Added test sse3-avx-addsub-2.ll to verify that we correctly emit 'addsub' instructions. llvm-svn: 211679		2014-06-25 10:02:21 +00:00
clang	AST: Initialization with dllimport functions in C	2014-06-25 08:15:07 +00:00
clang-tools-extra	Track changes from clang r211448.	2014-06-21 23:33:00 +00:00
compiler-rt	Remove ARM XFAIL from passing test	2014-06-24 16:58:59 +00:00
debuginfo-tests	relax testcase for LLDB output format compatibility.	2014-03-19 23:06:18 +00:00
libclc	Add half limits	2014-06-24 09:51:01 +00:00
libcxx	eliminate install of duplicate headers (take 2)	2014-06-24 20:32:11 +00:00
libcxxabi	Add a FAQ section, with a question about why the std::exception class destructors live in libc++abi	2014-06-11 16:54:09 +00:00
lld	[ELF] Add two new virtual functions to the `OutputELFWriter` class to control	2014-06-25 07:55:55 +00:00
lldb	Replace GCC-specific intrinsic with portable alternative.	2014-06-25 05:42:32 +00:00
llvm	[X86] Add target combine rule to select ADDSUB instructions from a build_vector	2014-06-25 10:02:21 +00:00
openmp	CMake: remove duplicated source file from list	2014-06-02 13:09:24 +00:00
polly	test/ScopInfo: Remove %defaultOpts and list passes explicitly	2014-06-25 06:38:18 +00:00