.. |
AsmParser
|
[AMDGPU][llvm-mc] Fixes to support buffer atomics.
|
2016-05-19 12:22:39 +00:00 |
Disassembler
|
Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD."
|
2016-04-29 17:04:50 +00:00 |
InstPrinter
|
AMDGPU: Add support for MCExpr to instruction printer
|
2016-05-13 20:39:24 +00:00 |
MCTargetDesc
|
AMDGPU: Fix incorrect simm check
|
2016-05-18 19:07:58 +00:00 |
TargetInfo
|
Remove autoconf support
|
2016-01-26 21:29:08 +00:00 |
Utils
|
AMDGPU: Fix getIntegerAttribute type and error message
|
2016-05-12 02:45:18 +00:00 |
AMDGPU.h
|
AMDGPU/EG,CM: Add instruction to read from constant AS (VTX2)
|
2016-05-13 20:39:16 +00:00 |
AMDGPU.td
|
[AMDGPU] Update nop insertion for debugger usage
|
2016-05-13 18:21:28 +00:00 |
AMDGPUAlwaysInlinePass.cpp
|
Cloning: Clean up the interface to the CloneFunction function.
|
2016-05-10 20:23:24 +00:00 |
AMDGPUAnnotateKernelFeatures.cpp
|
AMDGPU: Implement addrspacecast
|
2016-04-25 19:27:24 +00:00 |
AMDGPUAnnotateUniformValues.cpp
|
Add optimization bisect opt-in calls for AMDGPU passes
|
2016-04-25 22:23:44 +00:00 |
AMDGPUAsmPrinter.cpp
|
AMDGPU/SI: Add support for AMD code object version 2.
|
2016-05-05 17:03:33 +00:00 |
AMDGPUAsmPrinter.h
|
[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
|
2016-04-26 17:24:40 +00:00 |
AMDGPUCallLowering.cpp
|
AMDGPU: Add skeleton GlobalIsel implementation
|
2016-04-14 19:09:28 +00:00 |
AMDGPUCallLowering.h
|
AMDGPU: Add skeleton GlobalIsel implementation
|
2016-04-14 19:09:28 +00:00 |
AMDGPUCallingConv.td
|
AMDGPU: Add a shader calling convention
|
2016-04-06 19:40:20 +00:00 |
AMDGPUFrameLowering.cpp
|
AMDGPU: Fix old comments that mention AMDIL
|
2016-01-20 21:22:21 +00:00 |
AMDGPUFrameLowering.h
|
AMDGPU: Create emergency stack slots during frame lowering
|
2015-11-06 18:17:45 +00:00 |
AMDGPUISelDAGToDAG.cpp
|
AMDGPU/R600: Implement memory loads from constant AS
|
2016-05-13 20:39:29 +00:00 |
AMDGPUISelLowering.cpp
|
AMDGPU: Remove pointless conversions
|
2016-05-19 21:09:58 +00:00 |
AMDGPUISelLowering.h
|
AMDGPU: Remove custom load/store scalarization
|
2016-04-14 23:31:26 +00:00 |
AMDGPUInstrInfo.cpp
|
AMDGPU: Move subtarget specific code out of AMDGPUInstrInfo.cpp
|
2016-01-28 16:04:37 +00:00 |
AMDGPUInstrInfo.h
|
AMDGPU: Add SIWholeQuadMode pass
|
2016-03-21 20:28:33 +00:00 |
AMDGPUInstrInfo.td
|
AMDGPU: Make CONST_DATA_PTR available to R600
|
2016-05-13 20:39:18 +00:00 |
AMDGPUInstructions.td
|
AMDGPU: Implement canonicalize
|
2016-04-14 01:42:16 +00:00 |
AMDGPUIntrinsicInfo.cpp
|
[llvm-tblgen] Avoid StringMatcher for GCC and MS builtin names
|
2016-01-27 01:43:12 +00:00 |
AMDGPUIntrinsicInfo.h
|
AMDGPU: R600 code splitting cleanup
|
2016-03-11 08:00:27 +00:00 |
AMDGPUIntrinsics.td
|
AMDGPU: Remove bfi and bfm intrinsics
|
2016-02-08 19:06:01 +00:00 |
AMDGPUMCInstLower.cpp
|
AMDGPU: Verify instructions in non-debug builds as well
|
2016-03-16 09:10:42 +00:00 |
AMDGPUMCInstLower.h
|
AMDGPU: R600 code splitting cleanup
|
2016-03-11 08:00:27 +00:00 |
AMDGPUMachineFunction.cpp
|
Revert "AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2."
|
2016-05-06 14:59:04 +00:00 |
AMDGPUMachineFunction.h
|
Revert "AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2."
|
2016-05-06 14:59:04 +00:00 |
AMDGPUOpenCLImageTypeLoweringPass.cpp
|
[NFC] Header cleanup
|
2016-04-18 09:17:29 +00:00 |
AMDGPUPromoteAlloca.cpp
|
AMDGPU: Fix promote alloca for pointer loads
|
2016-05-18 23:20:24 +00:00 |
AMDGPURegisterInfo.cpp
|
…
|
|
AMDGPURegisterInfo.h
|
AMDGPU: R600 code splitting cleanup
|
2016-03-11 08:00:27 +00:00 |
AMDGPURegisterInfo.td
|
AMDGPU: Set SubRegIndex size and offset
|
2015-07-30 17:03:11 +00:00 |
AMDGPUSubtarget.cpp
|
AMDGPU: Fix promote alloca pass creating huge arrays
|
2016-05-16 21:19:59 +00:00 |
AMDGPUSubtarget.h
|
AMDGPU: Fix promote alloca pass creating huge arrays
|
2016-05-16 21:19:59 +00:00 |
AMDGPUTargetMachine.cpp
|
Delete Reloc::Default.
|
2016-05-18 22:04:49 +00:00 |
AMDGPUTargetMachine.h
|
Delete Reloc::Default.
|
2016-05-18 22:04:49 +00:00 |
AMDGPUTargetObjectFile.cpp
|
AMDGPU/SI: Add support for AMD code object version 2.
|
2016-05-05 17:03:33 +00:00 |
AMDGPUTargetObjectFile.h
|
AMDGPU/SI: Add support for AMD code object version 2.
|
2016-05-05 17:03:33 +00:00 |
AMDGPUTargetTransformInfo.cpp
|
AMDGPU: llvm.SI.fs.constant is a source of divergence
|
2016-05-02 17:37:01 +00:00 |
AMDGPUTargetTransformInfo.h
|
AMDGPU: Other sizes of popcnt are fast
|
2016-05-18 16:10:19 +00:00 |
AMDILCFGStructurizer.cpp
|
Bug 20810: Use report_fatal_error instead of unreachable
|
2016-03-02 03:33:55 +00:00 |
AMDKernelCodeT.h
|
[AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields)
|
2016-02-24 10:54:25 +00:00 |
CIInstructions.td
|
AMDGPU: Implement i64 global atomics
|
2016-04-12 14:05:11 +00:00 |
CMakeLists.txt
|
[AMDGPU][NFC] Rename SIInsertNops -> SIDebuggerInsertNops
|
2016-05-10 18:33:41 +00:00 |
CaymanInstructions.td
|
AMDGPU/EG,CM: Add instruction to read from constant AS (VTX2)
|
2016-05-13 20:39:16 +00:00 |
EvergreenInstructions.td
|
AMDGPU/EG,CM: Add instruction to read from constant AS (VTX2)
|
2016-05-13 20:39:16 +00:00 |
GCNHazardRecognizer.cpp
|
Silence unused variable warning; NFC.
|
2016-05-03 15:17:25 +00:00 |
GCNHazardRecognizer.h
|
AMDGPU/SI: Use the hazard recognizer to break SMEM soft clauses
|
2016-05-02 17:39:06 +00:00 |
LLVMBuild.txt
|
[AMDGPU] Disassembler: Added basic disassembler for AMDGPU target
|
2016-02-18 03:42:32 +00:00 |
Processors.td
|
AMDGPU/SI: Add Polaris support
|
2016-03-24 15:31:05 +00:00 |
R600ClauseMergePass.cpp
|
Add optimization bisect opt-in calls for AMDGPU passes
|
2016-04-25 22:23:44 +00:00 |
R600ControlFlowFinalizer.cpp
|
AMDGPU/R600: Implement memory loads from constant AS
|
2016-05-13 20:39:29 +00:00 |
R600Defines.h
|
AMDGPU: R600 code splitting cleanup
|
2016-03-11 08:00:27 +00:00 |
R600EmitClauseMarkers.cpp
|
…
|
|
R600ExpandSpecialInstrs.cpp
|
…
|
|
R600ISelLowering.cpp
|
AMDGPU/R600: Use correct number of vector elements when lowering private loads
|
2016-05-16 23:56:32 +00:00 |
R600ISelLowering.h
|
Fix instance of -Winconsistent-missing-override in AMDGPU code
|
2016-05-02 19:45:10 +00:00 |
R600InstrFormats.td
|
…
|
|
R600InstrInfo.cpp
|
AMDGPU/R600: There are other uses for ALU_LITERAL besides Imm
|
2016-05-13 20:39:20 +00:00 |
R600InstrInfo.h
|
[NFC] Header cleanup
|
2016-04-18 09:17:29 +00:00 |
R600Instructions.td
|
AMDGPU/R600: Implement memory loads from constant AS
|
2016-05-13 20:39:29 +00:00 |
R600Intrinsics.td
|
AMDGPU: Move AMDGPU intrinsics only used by R600
|
2016-01-26 04:49:24 +00:00 |
R600MachineFunctionInfo.cpp
|
…
|
|
R600MachineFunctionInfo.h
|
[NFC] Header cleanup
|
2016-04-18 09:17:29 +00:00 |
R600MachineScheduler.cpp
|
…
|
|
R600MachineScheduler.h
|
AMDGPU: R600 code splitting cleanup
|
2016-03-11 08:00:27 +00:00 |
R600OptimizeVectorRegisters.cpp
|
Add optimization bisect opt-in calls for AMDGPU passes
|
2016-04-25 22:23:44 +00:00 |
R600Packetizer.cpp
|
AMDGPU: Simplify boolean conditional return statements
|
2016-03-02 23:00:21 +00:00 |
R600RegisterInfo.cpp
|
…
|
|
R600RegisterInfo.h
|
AMDGPU: R600 code splitting cleanup
|
2016-03-11 08:00:27 +00:00 |
R600RegisterInfo.td
|
…
|
|
R600Schedule.td
|
…
|
|
R600TextureIntrinsicsReplacer.cpp
|
AMDGPU: Rename some r600 intrinsics to use correct TargetPrefix
|
2016-01-22 19:00:09 +00:00 |
R700Instructions.td
|
…
|
|
SIAnnotateControlFlow.cpp
|
[StructurizeCFG] Annotate branches that were treated as uniform
|
2016-04-14 17:42:35 +00:00 |
SIDebuggerInsertNops.cpp
|
[AMDGPU] Update nop insertion for debugger usage
|
2016-05-13 18:21:28 +00:00 |
SIDefines.h
|
[AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.
|
2016-05-06 17:48:48 +00:00 |
SIFixControlFlowLiveIntervals.cpp
|
AMDGPU: Remove unused includes
|
2015-09-25 00:28:43 +00:00 |
SIFixSGPRCopies.cpp
|
AMDGPU: Fix debug name of pass to better match
|
2016-04-21 18:21:54 +00:00 |
SIFoldOperands.cpp
|
Add optimization bisect opt-in calls for AMDGPU passes
|
2016-04-25 22:23:44 +00:00 |
SIFrameLowering.cpp
|
AMDGPU: Fix assert on ttmp registers
|
2016-05-18 15:19:50 +00:00 |
SIFrameLowering.h
|
AMDGPU: Remove SIPrepareScratchRegs
|
2015-11-30 21:15:53 +00:00 |
SIISelLowering.cpp
|
AMDGPU: Unify LowerGlobalAddress
|
2016-05-13 20:39:34 +00:00 |
SIISelLowering.h
|
AMDGPU: Unify LowerGlobalAddress
|
2016-05-13 20:39:34 +00:00 |
SIInsertWaits.cpp
|
AMDGPU/SI: Use the hazard recognizer to break SMEM soft clauses
|
2016-05-02 17:39:06 +00:00 |
SIInstrFormats.td
|
[TableGen] AsmMatcher: support for default values for optional operands
|
2016-05-06 11:31:17 +00:00 |
SIInstrInfo.cpp
|
AMDGPU: Implement AnalyzeBranch
|
2016-05-21 00:29:27 +00:00 |
SIInstrInfo.h
|
AMDGPU: Implement AnalyzeBranch
|
2016-05-21 00:29:27 +00:00 |
SIInstrInfo.td
|
[AMDGPU][llvm-mc] Fixes to support buffer atomics.
|
2016-05-19 12:22:39 +00:00 |
SIInstructions.td
|
AMDGPU: Make CONST_DATA_PTR available to R600
|
2016-05-13 20:39:18 +00:00 |
SIIntrinsics.td
|
Split IntrReadArgMem into IntrReadMem and IntrArgMemOnly
|
2016-04-21 17:48:02 +00:00 |
SILoadStoreOptimizer.cpp
|
Add optimization bisect opt-in calls for AMDGPU passes
|
2016-04-25 22:23:44 +00:00 |
SILowerControlFlow.cpp
|
AMDGPU: Also look for s_cbranch_vccz
|
2016-05-19 18:20:25 +00:00 |
SILowerI1Copies.cpp
|
AMDGPU: Fix passes depending on dominator tree for no reason
|
2016-02-11 06:15:34 +00:00 |
SIMachineFunctionInfo.cpp
|
[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
|
2016-04-26 17:24:40 +00:00 |
SIMachineFunctionInfo.h
|
[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
|
2016-04-26 17:24:40 +00:00 |
SIMachineScheduler.cpp
|
AMDGPU/SI: Use range loops to simplify some code in the SI Scheduler
|
2016-05-03 16:30:56 +00:00 |
SIMachineScheduler.h
|
AMDGPU: R600 code splitting cleanup
|
2016-03-11 08:00:27 +00:00 |
SIRegisterInfo.cpp
|
AMDGPU: Fix verifier error when spilling undef subreg
|
2016-05-18 23:35:53 +00:00 |
SIRegisterInfo.h
|
AMDGPU/SI: Enable the post-ra scheduler
|
2016-04-30 00:23:06 +00:00 |
SIRegisterInfo.td
|
Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD."
|
2016-04-29 17:04:50 +00:00 |
SISchedule.td
|
AMDGPU/SI: Enable the post-ra scheduler
|
2016-04-30 00:23:06 +00:00 |
SIShrinkInstructions.cpp
|
Add optimization bisect opt-in calls for AMDGPU passes
|
2016-04-25 22:23:44 +00:00 |
SITypeRewriter.cpp
|
AMDGPU: Add a shader calling convention
|
2016-04-06 19:40:20 +00:00 |
SIWholeQuadMode.cpp
|
AMDGPU/SI: add llvm.amdgcn.ps.live intrinsic
|
2016-04-22 04:04:08 +00:00 |
VIInstrFormats.td
|
[TableGen] AsmMatcher: support for default values for optional operands
|
2016-05-06 11:31:17 +00:00 |
VIInstructions.td
|
[AMDGPU] Assembler: change v_madmk operands to have same order as mad.
|
2016-03-11 09:27:25 +00:00 |