forked from OSchip/llvm-project
178 lines
5.0 KiB
LLVM
178 lines
5.0 KiB
LLVM
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s --check-prefixes=PPC64
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; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck %s --check-prefixes=PPC32
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define { i128, i8 } @muloti_test(i128 %l, i128 %r) unnamed_addr #0 {
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; PPC64-LABEL muloti_test:
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; PPC64: mulld 8, 5, 4
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; PPC64-NEXT: cmpdi 5, 3, 0
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; PPC64-NEXT: mulhdu. 9, 3, 6
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; PPC64-NEXT: mulld 3, 3, 6
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; PPC64-NEXT: mcrf 1, 0
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; PPC64-NEXT: add 3, 3, 8
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; PPC64-NEXT: cmpdi 5, 0
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; PPC64-NEXT: crnor 20, 2, 22
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; PPC64-NEXT: cmpldi 3, 0
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; PPC64-NEXT: mulhdu 8, 4, 6
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; PPC64-NEXT: add 3, 8, 3
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; PPC64-NEXT: cmpld 6, 3, 8
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; PPC64-NEXT: crandc 21, 24, 2
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; PPC64-NEXT: crorc 20, 20, 6
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; PPC64-NEXT: li 7, 1
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; PPC64-NEXT: mulhdu. 5, 5, 4
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; PPC64-NEXT: crorc 20, 20, 2
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; PPC64-NEXT: crnor 20, 20, 21
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; PPC64-NEXT: mulld 4, 4, 6
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; PPC64-NEXT: bc 12, 20, .LBB0_2
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; PPC64: ori 5, 7, 0
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; PPC64-NEXT: blr
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; PPC64-NEXT: .LBB0_2:
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; PPC64-NEXT: addi 5, 0, 0
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; PPC64-NEXT: blr
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;
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; PPC32-LABEL muloti_test:
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; PPC32: mflr 0
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; PPC32-NEXT: stw 0, 4(1)
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; PPC32-NEXT: stwu 1, -80(1)
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; PPC32-NEXT: .cfi_def_cfa_offset 80
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; PPC32-NEXT: .cfi_offset lr, 4
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; PPC32-NEXT: .cfi_offset r20, -48
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; PPC32-NEXT: .cfi_offset r21, -44
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; PPC32-NEXT: .cfi_offset r22, -40
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; PPC32-NEXT: .cfi_offset r23, -36
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; PPC32-NEXT: .cfi_offset r24, -32
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; PPC32-NEXT: .cfi_offset r25, -28
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; PPC32-NEXT: .cfi_offset r26, -24
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; PPC32-NEXT: .cfi_offset r27, -20
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; PPC32-NEXT: .cfi_offset r28, -16
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; PPC32-NEXT: .cfi_offset r29, -12
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; PPC32-NEXT: .cfi_offset r30, -8
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; PPC32-NEXT: stw 26, 56(1)
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; PPC32-NEXT: stw 27, 60(1)
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; PPC32-NEXT: stw 29, 68(1)
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; PPC32-NEXT: stw 30, 72(1)
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; PPC32-NEXT: mfcr 12
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; PPC32-NEXT: mr 30, 8
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; PPC32-NEXT: mr 29, 7
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; PPC32-NEXT: mr 27, 4
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; PPC32-NEXT: mr 26, 3
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; PPC32-NEXT: li 3, 0
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; PPC32-NEXT: li 4, 0
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; PPC32-NEXT: li 7, 0
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; PPC32-NEXT: li 8, 0
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; PPC32-NEXT: stw 20, 32(1)
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; PPC32-NEXT: stw 21, 36(1)
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; PPC32-NEXT: stw 22, 40(1)
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; PPC32-NEXT: stw 23, 44(1)
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; PPC32-NEXT: stw 24, 48(1)
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; PPC32-NEXT: stw 25, 52(1)
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; PPC32-NEXT: stw 28, 64(1)
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; PPC32-NEXT: mr 25, 10
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; PPC32-NEXT: stw 12, 28(1)
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; PPC32-NEXT: mr 28, 9
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; PPC32-NEXT: mr 23, 6
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; PPC32-NEXT: mr 24, 5
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; PPC32-NEXT: bl __multi3@PLT
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; PPC32-NEXT: mr 7, 4
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; PPC32-NEXT: mullw 4, 24, 30
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; PPC32-NEXT: mullw 8, 29, 23
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; PPC32-NEXT: mullw 10, 28, 27
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; PPC32-NEXT: mullw 11, 26, 25
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; PPC32-NEXT: mulhwu 9, 30, 23
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; PPC32-NEXT: mulhwu 12, 27, 25
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; PPC32-NEXT: mullw 0, 30, 23
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; PPC32-NEXT: mullw 22, 27, 25
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; PPC32-NEXT: add 21, 8, 4
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; PPC32-NEXT: add 10, 11, 10
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; PPC32-NEXT: addc 4, 22, 0
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; PPC32-NEXT: add 11, 9, 21
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; PPC32-NEXT: add 0, 12, 10
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; PPC32-NEXT: adde 8, 0, 11
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; PPC32-NEXT: addc 4, 7, 4
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; PPC32-NEXT: adde 8, 3, 8
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; PPC32-NEXT: xor 22, 4, 7
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; PPC32-NEXT: xor 20, 8, 3
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; PPC32-NEXT: or. 22, 22, 20
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; PPC32-NEXT: mcrf 1, 0
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; PPC32-NEXT: cmpwi 29, 0
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; PPC32-NEXT: cmpwi 5, 24, 0
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; PPC32-NEXT: cmpwi 6, 26, 0
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; PPC32-NEXT: cmpwi 7, 28, 0
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; PPC32-NEXT: crnor 8, 22, 2
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; PPC32-NEXT: mulhwu. 23, 29, 23
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; PPC32-NEXT: crnor 9, 30, 26
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; PPC32-NEXT: mcrf 5, 0
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; PPC32-NEXT: cmplwi 21, 0
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; PPC32-NEXT: cmplw 6, 11, 9
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; PPC32-NEXT: cmplwi 7, 10, 0
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; PPC32-NEXT: crandc 10, 24, 2
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; PPC32-NEXT: cmplw 3, 0, 12
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; PPC32-NEXT: mulhwu. 9, 24, 30
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; PPC32-NEXT: mcrf 6, 0
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; PPC32-NEXT: crandc 11, 12, 30
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; PPC32-NEXT: cmplw 4, 7
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; PPC32-NEXT: cmplw 7, 8, 3
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; PPC32-NEXT: crand 12, 30, 0
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; PPC32-NEXT: crandc 13, 28, 30
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; PPC32-NEXT: mulhwu. 3, 26, 25
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; PPC32-NEXT: mcrf 7, 0
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; PPC32-NEXT: cror 0, 12, 13
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; PPC32-NEXT: crandc 12, 0, 6
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; PPC32-NEXT: crorc 20, 8, 22
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; PPC32-NEXT: crorc 20, 20, 26
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; PPC32-NEXT: mulhwu. 3, 28, 27
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; PPC32-NEXT: mcrf 1, 0
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; PPC32-NEXT: crorc 25, 9, 30
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; PPC32-NEXT: or. 3, 27, 26
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; PPC32-NEXT: cror 24, 20, 10
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; PPC32-NEXT: mcrf 5, 0
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; PPC32-NEXT: crorc 25, 25, 6
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; PPC32-NEXT: or. 3, 30, 29
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; PPC32-NEXT: cror 25, 25, 11
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; PPC32-NEXT: crnor 20, 2, 22
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; PPC32-NEXT: lwz 12, 28(1)
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; PPC32-NEXT: cror 20, 20, 25
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; PPC32-NEXT: cror 20, 20, 24
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; PPC32-NEXT: crnor 20, 20, 12
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; PPC32-NEXT: li 3, 1
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; PPC32-NEXT: bc 12, 20, .LBB0_2
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; PPC32: ori 7, 3, 0
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; PPC32-NEXT: b .LBB0_3
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; PPC32-NEXT:.LBB0_2:
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; PPC32-NEXT: addi 7, 0, 0
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; PPC32-NEXT:.LBB0_3:
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; PPC32-NEXT: mr 3, 8
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; PPC32-NEXT: mtcrf 32, 12
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; PPC32-NEXT: mtcrf 16, 12
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; PPC32-NEXT: lwz 30, 72(1)
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; PPC32-NEXT: lwz 29, 68(1)
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; PPC32-NEXT: lwz 28, 64(1)
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; PPC32-NEXT: lwz 27, 60(1)
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; PPC32-NEXT: lwz 26, 56(1)
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; PPC32-NEXT: lwz 25, 52(1)
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; PPC32-NEXT: lwz 24, 48(1)
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; PPC32-NEXT: lwz 23, 44(1)
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; PPC32-NEXT: lwz 22, 40(1)
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; PPC32-NEXT: lwz 21, 36(1)
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; PPC32-NEXT: lwz 20, 32(1)
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; PPC32-NEXT: lwz 0, 84(1)
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; PPC32-NEXT: addi 1, 1, 80
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; PPC32-NEXT: mtlr 0
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; PPC32-NEXT: blr
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start:
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%0 = tail call { i128, i1 } @llvm.umul.with.overflow.i128(i128 %l, i128 %r) #2
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%1 = extractvalue { i128, i1 } %0, 0
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%2 = extractvalue { i128, i1 } %0, 1
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%3 = zext i1 %2 to i8
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%4 = insertvalue { i128, i8 } undef, i128 %1, 0
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%5 = insertvalue { i128, i8 } %4, i8 %3, 1
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ret { i128, i8 } %5
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}
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; Function Attrs: nounwind readnone speculatable
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declare { i128, i1 } @llvm.umul.with.overflow.i128(i128, i128) #1
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attributes #0 = { nounwind readnone uwtable }
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attributes #1 = { nounwind readnone speculatable }
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attributes #2 = { nounwind }
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