forked from OSchip/llvm-project
26 lines
1.0 KiB
TableGen
26 lines
1.0 KiB
TableGen
//=- AArch64.td - Define AArch64 Combine Rules ---------------*- tablegen -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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include "llvm/Target/GlobalISel/Combine.td"
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def fconstant_to_constant : GICombineRule<
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(defs root:$root),
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(match (wip_match_opcode G_FCONSTANT):$root,
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[{ return matchFConstantToConstant(*${root}, MRI); }]),
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(apply [{ applyFConstantToConstant(*${root}); }])>;
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def AArch64PreLegalizerCombinerHelper: GICombinerHelper<
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"AArch64GenPreLegalizerCombinerHelper", [all_combines,
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elide_br_by_inverting_cond,
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fconstant_to_constant]> {
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let DisableRuleOption = "aarch64prelegalizercombiner-disable-rule";
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}
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