Michael Kuperstein 38e7298093 [SLPVectorizer] Vectorize reverse-order loads in horizontal reductions ... When vectorizing a tree rooted at a store bundle, we currently try to sort the stores before building the tree, so that the stores can be vectorized. For other trees, the order of the root bundle - which determines the order of all other bundles - is arbitrary. That is bad, since if a leaf bundle of consecutive loads happens to appear in the wrong order, we will not vectorize it. This is partially mitigated when the root is a binary operator, by trying to build a "reversed" tree when that's considered profitable. This patch extends the workaround we have for binops to trees rooted in a horizontal reduction. This fixes PR28474. Differential Revision: https://reviews.llvm.org/D22554 llvm-svn: 276477		2016-07-22 21:28:48 +00:00
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AArch64	[TTI] Add hook for vector extract with extension	2016-04-27 15:20:21 +00:00
AMDGPU	[SLPVectorizer] Try different vectorization factors for store chains	2015-07-08 23:40:55 +00:00
ARM	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
PowerPC	[SLP] Pass in correct alignment when query memory access cost	2016-05-31 20:41:19 +00:00
X86	[SLPVectorizer] Vectorize reverse-order loads in horizontal reductions	2016-07-22 21:28:48 +00:00
XCore	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00