forked from OSchip/llvm-project
96 lines
4.0 KiB
LLVM
96 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv8.1m.main -mattr=+lob --verify-machineinstrs %s -o - | FileCheck %s
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define arm_aapcs_vfpcc void @test(i16* noalias nocapture readonly %off, i16* noalias nocapture %data, i16* noalias nocapture %dst, i32 %n) {
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; CHECK-LABEL: test:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, lr}
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; CHECK-NEXT: cmp r3, #1
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; CHECK-NEXT: blt .LBB0_7
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; CHECK-NEXT: @ %bb.1: @ %for.cond1.preheader.us.preheader
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; CHECK-NEXT: lsl.w r12, r3, #1
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; CHECK-NEXT: mov.w r8, #0
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; CHECK-NEXT: mov r4, r1
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; CHECK-NEXT: .LBB0_2: @ %for.cond1.preheader.us
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; CHECK-NEXT: @ =>This Loop Header: Depth=1
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; CHECK-NEXT: @ Child Loop BB0_3 Depth 2
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; CHECK-NEXT: @ Child Loop BB0_5 Depth 2
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; CHECK-NEXT: movs r5, #0
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; CHECK-NEXT: dls lr, r3
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; CHECK-NEXT: .LBB0_3: @ %for.body4.us
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; CHECK-NEXT: @ Parent Loop BB0_2 Depth=1
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; CHECK-NEXT: @ => This Inner Loop Header: Depth=2
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; CHECK-NEXT: ldrh.w r6, [r0, r5, lsl #1]
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; CHECK-NEXT: ldrh.w r7, [r1, r5, lsl #1]
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; CHECK-NEXT: add r6, r7
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; CHECK-NEXT: strh.w r6, [r4, r5, lsl #1]
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; CHECK-NEXT: adds r5, #1
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; CHECK-NEXT: le lr, .LBB0_3
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; CHECK-NEXT: @ %bb.4: @ %for.body15.us.preheader
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; CHECK-NEXT: @ in Loop: Header=BB0_2 Depth=1
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; CHECK-NEXT: movs r5, #0
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; CHECK-NEXT: .LBB0_5: @ %for.body15.us
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; CHECK-NEXT: @ Parent Loop BB0_2 Depth=1
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; CHECK-NEXT: @ => This Inner Loop Header: Depth=2
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; CHECK-NEXT: ldrh.w r6, [r0, r5, lsl #1]
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; CHECK-NEXT: ldrh.w r7, [r1, r5, lsl #1]
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; CHECK-NEXT: add r7, r6
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; CHECK-NEXT: strh.w r7, [r2, r5, lsl #1]
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; CHECK-NEXT: adds r5, #1
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; CHECK-NEXT: cmp r3, r5
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; CHECK-NEXT: bne .LBB0_5
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; CHECK-NEXT: @ %bb.6: @ %for.cond.cleanup14.us
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; CHECK-NEXT: @ in Loop: Header=BB0_2 Depth=1
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; CHECK-NEXT: add.w r8, r8, #1
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; CHECK-NEXT: add r2, r12
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; CHECK-NEXT: add r4, r12
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; CHECK-NEXT: cmp r8, r3
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; CHECK-NEXT: bne .LBB0_2
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; CHECK-NEXT: .LBB0_7: @ %for.cond.cleanup
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; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, pc}
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entry:
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%cmp252 = icmp sgt i32 %n, 0
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br i1 %cmp252, label %for.cond1.preheader.us, label %for.cond.cleanup
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for.cond1.preheader.us: ; preds = %entry, %for.cond.cleanup14.us
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%i.057.us = phi i32 [ %inc29.us, %for.cond.cleanup14.us ], [ 0, %entry ]
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%mul.us = mul i32 %i.057.us, %n
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br label %for.body4.us
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for.cond.cleanup14.us: ; preds = %for.body15.us
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%inc29.us = add nuw i32 %i.057.us, 1
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%exitcond94 = icmp eq i32 %inc29.us, %n
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br i1 %exitcond94, label %for.cond.cleanup, label %for.cond1.preheader.us
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for.body15.us: ; preds = %for.body4.us, %for.body15.us
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%j10.055.us = phi i32 [ %inc26.us, %for.body15.us ], [ 0, %for.body4.us ]
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%arrayidx16.us = getelementptr inbounds i16, i16* %off, i32 %j10.055.us
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%0 = load i16, i16* %arrayidx16.us, align 2
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%arrayidx18.us = getelementptr inbounds i16, i16* %data, i32 %j10.055.us
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%1 = load i16, i16* %arrayidx18.us, align 2
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%add20.us = add i16 %1, %0
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%add23.us = add i32 %j10.055.us, %mul.us
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%arrayidx24.us = getelementptr inbounds i16, i16* %dst, i32 %add23.us
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store i16 %add20.us, i16* %arrayidx24.us, align 2
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%inc26.us = add nuw nsw i32 %j10.055.us, 1
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%exitcond93 = icmp eq i32 %inc26.us, %n
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br i1 %exitcond93, label %for.cond.cleanup14.us, label %for.body15.us
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for.body4.us: ; preds = %for.body4.us, %for.cond1.preheader.us
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%j.053.us = phi i32 [ 0, %for.cond1.preheader.us ], [ %inc.us, %for.body4.us ]
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%arrayidx.us = getelementptr inbounds i16, i16* %off, i32 %j.053.us
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%2 = load i16, i16* %arrayidx.us, align 2
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%arrayidx5.us = getelementptr inbounds i16, i16* %data, i32 %j.053.us
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%3 = load i16, i16* %arrayidx5.us, align 2
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%add.us = add i16 %3, %2
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%add8.us = add i32 %j.053.us, %mul.us
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%arrayidx9.us = getelementptr inbounds i16, i16* %data, i32 %add8.us
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store i16 %add.us, i16* %arrayidx9.us, align 2
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%inc.us = add nuw nsw i32 %j.053.us, 1
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%exitcond = icmp eq i32 %inc.us, %n
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br i1 %exitcond, label %for.body15.us, label %for.body4.us
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for.cond.cleanup: ; preds = %for.cond.cleanup14.us, %entry
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ret void
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}
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