forked from OSchip/llvm-project
30 lines
1.1 KiB
LLVM
30 lines
1.1 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; CHECK: dcfetch
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; CHECK: dcfetch{{.*}}#8
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target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a0:0-n16:32"
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target triple = "hexagon"
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; Function Attrs: nounwind
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define zeroext i8 @foo(i8* %addr) #0 {
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entry:
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%addr.addr = alloca i8*, align 4
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store i8* %addr, i8** %addr.addr, align 4
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%0 = load i8*, i8** %addr.addr, align 4
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call void @llvm.prefetch(i8* %0, i32 0, i32 3, i32 1)
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%1 = load i8*, i8** %addr.addr, align 4
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%2 = bitcast i8* %1 to i32*
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%3 = load i32, i32* %2, align 4
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%4 = add i32 %3, 8
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%5 = inttoptr i32 %4 to i8*
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call void @llvm.hexagon.prefetch(i8* %5)
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%6 = load i8, i8* %5
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ret i8 %6
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}
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; Function Attrs: nounwind
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declare void @llvm.prefetch(i8* nocapture, i32, i32, i32) #1
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declare void @llvm.hexagon.prefetch(i8* nocapture) #1
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attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { nounwind }
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