Aditya Nandakumar 6b4d343e13 [GISel]: Add missing opcodes for overflow intrinsics ... https://reviews.llvm.org/D51197 Currently, IRTranslator (and GISel) seems to be arbitrarily picking which overflow intrinsics get mapped into opcodes which either have a carry as an input or not. For intrinsics such as Intrinsic::uadd_with_overflow, translate it to an opcode (G_UADDO) which doesn't have any carry inputs (similar to LLVM IR). This patch adds 4 missing opcodes for completeness - G_UADDO, G_USUBO, G_SSUBE and G_SADDE. llvm-svn: 340865		2018-08-28 18:54:10 +00:00
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llvm	[GISel]: Add missing opcodes for overflow intrinsics	2018-08-28 18:54:10 +00:00
llvm-c	[AArch64] Add Tiny Code Model for AArch64	2018-08-22 11:31:39 +00:00