forked from OSchip/llvm-project
68 lines
2.1 KiB
LLVM
68 lines
2.1 KiB
LLVM
; RUN: opt %loadPolly \
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; RUN: -S -polly-codegen < %s | FileCheck %s
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;
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; void f(int *A, int N) {
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; for (int i = 0; i < N; i++)
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; switch (A[i]) {
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; case 0:
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; A[i] += 1;
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; break;
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; case 1:
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; A[i] += 2;
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; break;
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; }
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; }
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;
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; CHECK: polly.stmt.for.body:
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; CHECK: %scevgep = getelementptr i32, i32* %A, i64 %polly.indvar
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; CHECK: %tmp1_p_scalar_ = load i32, i32* %scevgep, align 4
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; CHECK: switch i32 %tmp1_p_scalar_, label %polly.stmt.sw.epilog.exit [
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; CHECK: i32 0, label %polly.stmt.sw.bb
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; CHECK: i32 1, label %polly.stmt.sw.bb.3
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; CHECK: ]
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @f(i32* %A, i32 %N) {
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entry:
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%tmp = sext i32 %N to i64
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br label %for.cond
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for.cond: ; preds = %for.inc, %entry
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ 0, %entry ]
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%cmp = icmp slt i64 %indvars.iv, %tmp
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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%tmp1 = load i32, i32* %arrayidx, align 4
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switch i32 %tmp1, label %sw.epilog [
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i32 0, label %sw.bb
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i32 1, label %sw.bb.3
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]
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sw.bb: ; preds = %for.body
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%arrayidx2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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%tmp2 = load i32, i32* %arrayidx2, align 4
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%add = add nsw i32 %tmp2, 1
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store i32 %add, i32* %arrayidx2, align 4
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br label %sw.epilog
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sw.bb.3: ; preds = %for.body
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%arrayidx5 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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%tmp3 = load i32, i32* %arrayidx5, align 4
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%add6 = add nsw i32 %tmp3, 2
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store i32 %add6, i32* %arrayidx5, align 4
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br label %sw.epilog
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sw.epilog: ; preds = %sw.bb.3, %sw.bb, %for.body
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br label %for.inc
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for.inc: ; preds = %sw.epilog
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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br label %for.cond
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for.end: ; preds = %for.cond
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ret void
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}
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