forked from OSchip/llvm-project
82 lines
2.5 KiB
ArmAsm
82 lines
2.5 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
|
|
|
|
// ------------------------------------------------------------------------- //
|
|
// Invalid result register
|
|
|
|
sqdecb w0
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
|
// CHECK-NEXT: sqdecb w0
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
sqdecb wsp
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
|
// CHECK-NEXT: sqdecb wsp
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
sqdecb sp
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
|
// CHECK-NEXT: sqdecb sp
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
sqdecb z0.b
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
|
// CHECK-NEXT: sqdecb z0.b
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
|
|
// ------------------------------------------------------------------------- //
|
|
// Operands not matching up
|
|
|
|
sqdecb x0, w1
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register
|
|
// CHECK-NEXT: sqdecb x0, w1
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
sqdecb x0, x1
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
|
// CHECK-NEXT: sqdecb x0, x1
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
|
|
// ------------------------------------------------------------------------- //
|
|
// Immediate not compatible with encode/decode function.
|
|
|
|
sqdecb x0, all, mul #-1
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
|
// CHECK-NEXT: sqdecb x0, all, mul #-1
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
sqdecb x0, all, mul #0
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
|
// CHECK-NEXT: sqdecb x0, all, mul #0
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
sqdecb x0, all, mul #17
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
|
// CHECK-NEXT: sqdecb x0, all, mul #17
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
|
|
// ------------------------------------------------------------------------- //
|
|
// Invalid predicate patterns
|
|
|
|
sqdecb x0, vl512
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
|
// CHECK-NEXT: sqdecb x0, vl512
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
sqdecb x0, vl9
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
|
// CHECK-NEXT: sqdecb x0, vl9
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
sqdecb x0, #-1
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
|
// CHECK-NEXT: sqdecb x0, #-1
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
sqdecb x0, #32
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
|
// CHECK-NEXT: sqdecb x0, #32
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|