forked from OSchip/llvm-project
39 lines
1.8 KiB
ArmAsm
39 lines
1.8 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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ld4w { z0.s, z1.s, z2.s, z3.s }, p0/z, [x0, x0, lsl #2]
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// CHECK-INST: ld4w { z0.s, z1.s, z2.s, z3.s }, p0/z, [x0, x0, lsl #2]
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// CHECK-ENCODING: [0x00,0xc0,0x60,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 c0 60 a5 <unknown>
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ld4w { z5.s, z6.s, z7.s, z8.s }, p3/z, [x17, x16, lsl #2]
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// CHECK-INST: ld4w { z5.s, z6.s, z7.s, z8.s }, p3/z, [x17, x16, lsl #2]
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// CHECK-ENCODING: [0x25,0xce,0x70,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 25 ce 70 a5 <unknown>
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ld4w { z0.s, z1.s, z2.s, z3.s }, p0/z, [x0]
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// CHECK-INST: ld4w { z0.s, z1.s, z2.s, z3.s }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xe0,0x60,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 e0 60 a5 <unknown>
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ld4w { z23.s, z24.s, z25.s, z26.s }, p3/z, [x13, #-32, mul vl]
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// CHECK-INST: ld4w { z23.s, z24.s, z25.s, z26.s }, p3/z, [x13, #-32, mul vl]
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// CHECK-ENCODING: [0xb7,0xed,0x68,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: b7 ed 68 a5 <unknown>
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ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl]
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// CHECK-INST: ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl]
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// CHECK-ENCODING: [0x55,0xf5,0x65,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 f5 65 a5 <unknown>
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