forked from OSchip/llvm-project
39 lines
1.8 KiB
ArmAsm
39 lines
1.8 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0, x0, lsl #1]
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// CHECK-INST: ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0, x0, lsl #1]
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// CHECK-ENCODING: [0x00,0xc0,0xe0,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 c0 e0 a4 <unknown>
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ld4h { z5.h, z6.h, z7.h, z8.h }, p3/z, [x17, x16, lsl #1]
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// CHECK-INST: ld4h { z5.h, z6.h, z7.h, z8.h }, p3/z, [x17, x16, lsl #1]
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// CHECK-ENCODING: [0x25,0xce,0xf0,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 25 ce f0 a4 <unknown>
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ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0]
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// CHECK-INST: ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xe0,0xe0,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 e0 e0 a4 <unknown>
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ld4h { z23.h, z24.h, z25.h, z26.h }, p3/z, [x13, #-32, mul vl]
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// CHECK-INST: ld4h { z23.h, z24.h, z25.h, z26.h }, p3/z, [x13, #-32, mul vl]
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// CHECK-ENCODING: [0xb7,0xed,0xe8,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: b7 ed e8 a4 <unknown>
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ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl]
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// CHECK-INST: ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl]
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// CHECK-ENCODING: [0x55,0xf5,0xe5,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 f5 e5 a4 <unknown>
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