forked from OSchip/llvm-project
39 lines
1.6 KiB
ArmAsm
39 lines
1.6 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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ld1rqb { z0.b }, p0/z, [x0]
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// CHECK-INST: ld1rqb { z0.b }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0x20,0x00,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 20 00 a4 <unknown>
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ld1rqb { z0.b }, p0/z, [x0, x0]
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// CHECK-INST: ld1rqb { z0.b }, p0/z, [x0, x0]
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// CHECK-ENCODING: [0x00,0x00,0x00,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 00 00 a4 <unknown>
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ld1rqb { z31.b }, p7/z, [sp, #-16]
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// CHECK-INST: ld1rqb { z31.b }, p7/z, [sp, #-16]
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// CHECK-ENCODING: [0xff,0x3f,0x0f,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 3f 0f a4 <unknown>
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ld1rqb { z23.b }, p3/z, [x13, #-128]
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// CHECK-INST: ld1rqb { z23.b }, p3/z, [x13, #-128]
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// CHECK-ENCODING: [0xb7,0x2d,0x08,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: b7 2d 08 a4 <unknown>
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ld1rqb { z21.b }, p5/z, [x10, #112]
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// CHECK-INST: ld1rqb { z21.b }, p5/z, [x10, #112]
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// CHECK-ENCODING: [0x55,0x35,0x07,0xa4]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 35 07 a4 <unknown>
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