forked from OSchip/llvm-project
40 lines
1.6 KiB
ArmAsm
40 lines
1.6 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
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fcmgt p0.b, p0/z, z0.b, z0.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
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// CHECK-NEXT: fcmgt p0.b, p0/z, z0.b, z0.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fcmgt p0.s, p0/z, z0.s, #1.0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
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// CHECK-NEXT: fcmgt p0.s, p0/z, z0.s, #1.0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z0.d, p0/z, z7.d
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fcmgt p0.d, p0/z, z0.d, #0.0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, #0.0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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movprfx z0, z7
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fcmgt p0.d, p0/z, z0.d, #0.0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, #0.0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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movprfx z0.d, p0/z, z7.d
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fcmgt p0.d, p0/z, z0.d, z1.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, z1.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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movprfx z0, z7
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fcmgt p0.d, p0/z, z0.d, z1.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, z1.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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