forked from OSchip/llvm-project
85 lines
3.0 KiB
ArmAsm
85 lines
3.0 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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asrd z0.b, p0/m, z0.b, #1
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// CHECK-INST: asrd z0.b, p0/m, z0.b, #1
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// CHECK-ENCODING: [0xe0,0x81,0x04,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 81 04 04 <unknown>
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asrd z31.b, p0/m, z31.b, #8
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// CHECK-INST: asrd z31.b, p0/m, z31.b, #8
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// CHECK-ENCODING: [0x1f,0x81,0x04,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 1f 81 04 04 <unknown>
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asrd z0.h, p0/m, z0.h, #1
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// CHECK-INST: asrd z0.h, p0/m, z0.h, #1
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// CHECK-ENCODING: [0xe0,0x83,0x04,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 83 04 04 <unknown>
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asrd z31.h, p0/m, z31.h, #16
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// CHECK-INST: asrd z31.h, p0/m, z31.h, #16
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// CHECK-ENCODING: [0x1f,0x82,0x04,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 1f 82 04 04 <unknown>
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asrd z0.s, p0/m, z0.s, #1
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// CHECK-INST: asrd z0.s, p0/m, z0.s, #1
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// CHECK-ENCODING: [0xe0,0x83,0x44,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 83 44 04 <unknown>
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asrd z31.s, p0/m, z31.s, #32
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// CHECK-INST: asrd z31.s, p0/m, z31.s, #32
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// CHECK-ENCODING: [0x1f,0x80,0x44,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 1f 80 44 04 <unknown>
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asrd z0.d, p0/m, z0.d, #1
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// CHECK-INST: asrd z0.d, p0/m, z0.d, #1
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// CHECK-ENCODING: [0xe0,0x83,0xc4,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 83 c4 04 <unknown>
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asrd z31.d, p0/m, z31.d, #64
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// CHECK-INST: asrd z31.d, p0/m, z31.d, #64
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// CHECK-ENCODING: [0x1f,0x80,0x84,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 1f 80 84 04 <unknown>
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// --------------------------------------------------------------------------//
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// Test compatibility with MOVPRFX instruction.
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movprfx z31.d, p0/z, z6.d
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// CHECK-INST: movprfx z31.d, p0/z, z6.d
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// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: df 20 d0 04 <unknown>
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asrd z31.d, p0/m, z31.d, #64
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// CHECK-INST: asrd z31.d, p0/m, z31.d, #64
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// CHECK-ENCODING: [0x1f,0x80,0x84,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 1f 80 84 04 <unknown>
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movprfx z31, z6
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// CHECK-INST: movprfx z31, z6
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// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: df bc 20 04 <unknown>
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asrd z31.d, p0/m, z31.d, #64
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// CHECK-INST: asrd z31.d, p0/m, z31.d, #64
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// CHECK-ENCODING: [0x1f,0x80,0x84,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 1f 80 84 04 <unknown>
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