forked from OSchip/llvm-project
6b035b607f
MC will now output the R_ARM_THM_PC8, R_ARM_THM_PC12 and R_ARM_THM_PREL_11_0 relocations. These are short-ranged relocations that are used to implement the adr rd, literal and ldr rd, literal pseudo instructions. The instructions use a new RelExpr called R_ARM_PCA in order to calculate the required S + A - Pa expression, where Pa is AlignDown(P, 4) as the instructions add their immediate to AlignDown(PC, 4). We also do not want these relocations to generate or resolve against a PLT entry as the range of these relocations is so short they would never reach. The R_ARM_THM_PC8 has a special encoding convention for the relocation addend, the immediate field is unsigned, yet the addend must be -4 to account for the Thumb PC bias. The ABI (not the architecture) uses the convention that the 8-byte immediate of 0xff represents -4. Differential Revision: https://reviews.llvm.org/D75042 |
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.. | ||
COFF | ||
Driver/Inputs | ||
ELF | ||
MinGW | ||
Unit | ||
darwin | ||
mach-o | ||
wasm | ||
CMakeLists.txt | ||
lit.cfg.py | ||
lit.site.cfg.py.in |