forked from OSchip/llvm-project
3171 lines
150 KiB
LLVM
3171 lines
150 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
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declare i32 @llvm.x86.avx512.kortestz.w(i16, i16) nounwind readnone
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; CHECK-LABEL: test_kortestz
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; CHECK: kortestw
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; CHECK: sete
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define i32 @test_kortestz(i16 %a0, i16 %a1) {
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%res = call i32 @llvm.x86.avx512.kortestz.w(i16 %a0, i16 %a1)
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ret i32 %res
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}
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declare i32 @llvm.x86.avx512.kortestc.w(i16, i16) nounwind readnone
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; CHECK-LABEL: test_kortestc
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; CHECK: kortestw
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; CHECK: sbbl
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define i32 @test_kortestc(i16 %a0, i16 %a1) {
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%res = call i32 @llvm.x86.avx512.kortestc.w(i16 %a0, i16 %a1)
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ret i32 %res
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}
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declare i16 @llvm.x86.avx512.kand.w(i16, i16) nounwind readnone
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; CHECK-LABEL: test_kand
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; CHECK: kandw
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; CHECK: kandw
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define i16 @test_kand(i16 %a0, i16 %a1) {
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%t1 = call i16 @llvm.x86.avx512.kand.w(i16 %a0, i16 8)
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%t2 = call i16 @llvm.x86.avx512.kand.w(i16 %t1, i16 %a1)
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ret i16 %t2
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}
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declare i16 @llvm.x86.avx512.knot.w(i16) nounwind readnone
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; CHECK-LABEL: test_knot
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; CHECK: knotw
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define i16 @test_knot(i16 %a0) {
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%res = call i16 @llvm.x86.avx512.knot.w(i16 %a0)
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ret i16 %res
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}
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declare i16 @llvm.x86.avx512.kunpck.bw(i16, i16) nounwind readnone
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; CHECK-LABEL: unpckbw_test
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; CHECK: kunpckbw
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; CHECK:ret
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define i16 @unpckbw_test(i16 %a0, i16 %a1) {
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%res = call i16 @llvm.x86.avx512.kunpck.bw(i16 %a0, i16 %a1)
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ret i16 %res
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}
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define <16 x float> @test_rcp_ps_512(<16 x float> %a0) {
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; CHECK: vrcp14ps {{.*}}encoding: [0x62,0xf2,0x7d,0x48,0x4c,0xc0]
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%res = call <16 x float> @llvm.x86.avx512.rcp14.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1) ; <<16 x float>> [#uses=1]
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.avx512.rcp14.ps.512(<16 x float>, <16 x float>, i16) nounwind readnone
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define <8 x double> @test_rcp_pd_512(<8 x double> %a0) {
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; CHECK: vrcp14pd {{.*}}encoding: [0x62,0xf2,0xfd,0x48,0x4c,0xc0]
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%res = call <8 x double> @llvm.x86.avx512.rcp14.pd.512(<8 x double> %a0, <8 x double> zeroinitializer, i8 -1) ; <<8 x double>> [#uses=1]
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ret <8 x double> %res
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}
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declare <8 x double> @llvm.x86.avx512.rcp14.pd.512(<8 x double>, <8 x double>, i8) nounwind readnone
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declare <8 x double> @llvm.x86.avx512.mask.rndscale.pd.512(<8 x double>, i32, <8 x double>, i8, i32)
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define <8 x double> @test7(<8 x double> %a) {
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; CHECK: vrndscalepd {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x0b]
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%res = call <8 x double> @llvm.x86.avx512.mask.rndscale.pd.512(<8 x double> %a, i32 11, <8 x double> %a, i8 -1, i32 4)
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ret <8 x double>%res
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}
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declare <16 x float> @llvm.x86.avx512.mask.rndscale.ps.512(<16 x float>, i32, <16 x float>, i16, i32)
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define <16 x float> @test8(<16 x float> %a) {
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; CHECK: vrndscaleps {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x0b]
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%res = call <16 x float> @llvm.x86.avx512.mask.rndscale.ps.512(<16 x float> %a, i32 11, <16 x float> %a, i16 -1, i32 4)
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ret <16 x float>%res
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}
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define <16 x float> @test_rsqrt_ps_512(<16 x float> %a0) {
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; CHECK: vrsqrt14ps {{.*}}encoding: [0x62,0xf2,0x7d,0x48,0x4e,0xc0]
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%res = call <16 x float> @llvm.x86.avx512.rsqrt14.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1) ; <<16 x float>> [#uses=1]
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.avx512.rsqrt14.ps.512(<16 x float>, <16 x float>, i16) nounwind readnone
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define <4 x float> @test_rsqrt14_ss(<4 x float> %a0) {
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; CHECK: vrsqrt14ss {{.*}}encoding: [0x62,0xf2,0x7d,0x08,0x4f,0xc0]
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%res = call <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone
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define <4 x float> @test_rcp14_ss(<4 x float> %a0) {
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; CHECK: vrcp14ss {{.*}}encoding: [0x62,0xf2,0x7d,0x08,0x4d,0xc0]
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%res = call <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone
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define <8 x double> @test_sqrt_pd_512(<8 x double> %a0) {
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; CHECK-LABEL: test_sqrt_pd_512
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; CHECK: vsqrtpd
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%res = call <8 x double> @llvm.x86.avx512.mask.sqrt.pd.512(<8 x double> %a0, <8 x double> zeroinitializer, i8 -1, i32 4)
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ret <8 x double> %res
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}
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declare <8 x double> @llvm.x86.avx512.mask.sqrt.pd.512(<8 x double>, <8 x double>, i8, i32) nounwind readnone
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define <16 x float> @test_sqrt_ps_512(<16 x float> %a0) {
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; CHECK-LABEL: test_sqrt_ps_512
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; CHECK: vsqrtps
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%res = call <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1, i32 4)
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ret <16 x float> %res
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}
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define <16 x float> @test_sqrt_round_ps_512(<16 x float> %a0) {
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; CHECK-LABEL: test_sqrt_round_ps_512
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; CHECK: vsqrtps {rz-sae}
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%res = call <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1, i32 3)
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float>, <16 x float>, i16, i32) nounwind readnone
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define <8 x double> @test_getexp_pd_512(<8 x double> %a0) {
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; CHECK-LABEL: test_getexp_pd_512
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; CHECK: vgetexppd
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%res = call <8 x double> @llvm.x86.avx512.mask.getexp.pd.512(<8 x double> %a0, <8 x double> zeroinitializer, i8 -1, i32 4)
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ret <8 x double> %res
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}
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define <8 x double> @test_getexp_round_pd_512(<8 x double> %a0) {
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; CHECK-LABEL: test_getexp_round_pd_512
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; CHECK: vgetexppd {sae}
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%res = call <8 x double> @llvm.x86.avx512.mask.getexp.pd.512(<8 x double> %a0, <8 x double> zeroinitializer, i8 -1, i32 8)
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ret <8 x double> %res
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}
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declare <8 x double> @llvm.x86.avx512.mask.getexp.pd.512(<8 x double>, <8 x double>, i8, i32) nounwind readnone
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define <16 x float> @test_getexp_ps_512(<16 x float> %a0) {
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; CHECK-LABEL: test_getexp_ps_512
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; CHECK: vgetexpps
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%res = call <16 x float> @llvm.x86.avx512.mask.getexp.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1, i32 4)
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ret <16 x float> %res
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}
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define <16 x float> @test_getexp_round_ps_512(<16 x float> %a0) {
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; CHECK-LABEL: test_getexp_round_ps_512
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; CHECK: vgetexpps {sae}
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%res = call <16 x float> @llvm.x86.avx512.mask.getexp.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1, i32 8)
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.avx512.mask.getexp.ps.512(<16 x float>, <16 x float>, i16, i32) nounwind readnone
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define <4 x float> @test_sqrt_ss(<4 x float> %a0, <4 x float> %a1) {
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; CHECK: vsqrtss {{.*}}encoding: [0x62
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%res = call <4 x float> @llvm.x86.avx512.sqrt.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.avx512.sqrt.ss(<4 x float>, <4 x float>) nounwind readnone
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define <2 x double> @test_sqrt_sd(<2 x double> %a0, <2 x double> %a1) {
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; CHECK: vsqrtsd {{.*}}encoding: [0x62
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%res = call <2 x double> @llvm.x86.avx512.sqrt.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1]
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.avx512.sqrt.sd(<2 x double>, <2 x double>) nounwind readnone
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define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) {
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; CHECK: vcvtsd2si {{.*}}encoding: [0x62
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%res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; <i64> [#uses=1]
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ret i64 %res
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}
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declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone
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define <2 x double> @test_x86_sse2_cvtsi642sd(<2 x double> %a0, i64 %a1) {
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; CHECK: vcvtsi2sdq {{.*}}encoding: [0x62
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%res = call <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double> %a0, i64 %a1) ; <<2 x double>> [#uses=1]
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readnone
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define i64 @test_x86_sse2_cvttsd2si64(<2 x double> %a0) {
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; CHECK: vcvttsd2si {{.*}}encoding: [0x62
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%res = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0) ; <i64> [#uses=1]
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ret i64 %res
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}
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declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone
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define i64 @test_x86_sse_cvtss2si64(<4 x float> %a0) {
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; CHECK: vcvtss2si {{.*}}encoding: [0x62
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%res = call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %a0) ; <i64> [#uses=1]
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ret i64 %res
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}
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declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone
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define <4 x float> @test_x86_sse_cvtsi642ss(<4 x float> %a0, i64 %a1) {
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; CHECK: vcvtsi2ssq {{.*}}encoding: [0x62
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%res = call <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float> %a0, i64 %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float>, i64) nounwind readnone
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define i64 @test_x86_sse_cvttss2si64(<4 x float> %a0) {
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; CHECK: vcvttss2si {{.*}}encoding: [0x62
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%res = call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %a0) ; <i64> [#uses=1]
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ret i64 %res
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}
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declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone
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define i64 @test_x86_avx512_cvtsd2usi64(<2 x double> %a0) {
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; CHECK: vcvtsd2usi {{.*}}encoding: [0x62
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%res = call i64 @llvm.x86.avx512.cvtsd2usi64(<2 x double> %a0) ; <i64> [#uses=1]
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ret i64 %res
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}
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declare i64 @llvm.x86.avx512.cvtsd2usi64(<2 x double>) nounwind readnone
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define <16 x float> @test_x86_vcvtph2ps_512(<16 x i16> %a0) {
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; CHECK: vcvtph2ps %ymm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x13,0xc0]
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%res = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> %a0, <16 x float> zeroinitializer, i16 -1, i32 4)
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16>, <16 x float>, i16, i32) nounwind readonly
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define <16 x i16> @test_x86_vcvtps2ph_256(<16 x float> %a0) {
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; CHECK: vcvtps2ph $2, %zmm0, %ymm0 ## encoding: [0x62,0xf3,0x7d,0x48,0x1d,0xc0,0x02]
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%res = call <16 x i16> @llvm.x86.avx512.mask.vcvtps2ph.512(<16 x float> %a0, i32 2, <16 x i16> zeroinitializer, i16 -1)
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ret <16 x i16> %res
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}
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declare <16 x i16> @llvm.x86.avx512.mask.vcvtps2ph.512(<16 x float>, i32, <16 x i16>, i16) nounwind readonly
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define <16 x float> @test_x86_vbroadcast_ss_512(i8* %a0) {
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; CHECK: vbroadcastss
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%res = call <16 x float> @llvm.x86.avx512.vbroadcast.ss.512(i8* %a0) ; <<16 x float>> [#uses=1]
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.avx512.vbroadcast.ss.512(i8*) nounwind readonly
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define <8 x double> @test_x86_vbroadcast_sd_512(i8* %a0) {
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; CHECK: vbroadcastsd
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%res = call <8 x double> @llvm.x86.avx512.vbroadcast.sd.512(i8* %a0) ; <<8 x double>> [#uses=1]
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ret <8 x double> %res
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}
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declare <8 x double> @llvm.x86.avx512.vbroadcast.sd.512(i8*) nounwind readonly
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define <16 x float> @test_x86_vbroadcast_ss_ps_512(<4 x float> %a0) {
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; CHECK: vbroadcastss
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%res = call <16 x float> @llvm.x86.avx512.vbroadcast.ss.ps.512(<4 x float> %a0) ; <<16 x float>> [#uses=1]
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ret <16 x float> %res
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}
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declare <16 x float> @llvm.x86.avx512.vbroadcast.ss.ps.512(<4 x float>) nounwind readonly
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define <8 x double> @test_x86_vbroadcast_sd_pd_512(<2 x double> %a0) {
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; CHECK: vbroadcastsd
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%res = call <8 x double> @llvm.x86.avx512.vbroadcast.sd.pd.512(<2 x double> %a0) ; <<8 x double>> [#uses=1]
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ret <8 x double> %res
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}
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declare <8 x double> @llvm.x86.avx512.vbroadcast.sd.pd.512(<2 x double>) nounwind readonly
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define <16 x i32> @test_x86_pbroadcastd_512(<4 x i32> %a0) {
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; CHECK: vpbroadcastd
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%res = call <16 x i32> @llvm.x86.avx512.pbroadcastd.512(<4 x i32> %a0) ; <<16 x i32>> [#uses=1]
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ret <16 x i32> %res
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}
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declare <16 x i32> @llvm.x86.avx512.pbroadcastd.512(<4 x i32>) nounwind readonly
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define <16 x i32> @test_x86_pbroadcastd_i32_512(i32 %a0) {
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; CHECK: vpbroadcastd
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%res = call <16 x i32> @llvm.x86.avx512.pbroadcastd.i32.512(i32 %a0) ; <<16 x i32>> [#uses=1]
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ret <16 x i32> %res
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}
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declare <16 x i32> @llvm.x86.avx512.pbroadcastd.i32.512(i32) nounwind readonly
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define <8 x i64> @test_x86_pbroadcastq_512(<2 x i64> %a0) {
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; CHECK: vpbroadcastq
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%res = call <8 x i64> @llvm.x86.avx512.pbroadcastq.512(<2 x i64> %a0) ; <<8 x i64>> [#uses=1]
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ret <8 x i64> %res
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}
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declare <8 x i64> @llvm.x86.avx512.pbroadcastq.512(<2 x i64>) nounwind readonly
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define <8 x i64> @test_x86_pbroadcastq_i64_512(i64 %a0) {
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; CHECK: vpbroadcastq
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%res = call <8 x i64> @llvm.x86.avx512.pbroadcastq.i64.512(i64 %a0) ; <<8 x i64>> [#uses=1]
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ret <8 x i64> %res
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}
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declare <8 x i64> @llvm.x86.avx512.pbroadcastq.i64.512(i64) nounwind readonly
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define <16 x i32> @test_conflict_d(<16 x i32> %a) {
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; CHECK: movw $-1, %ax
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; CHECK: vpxor
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; CHECK: vpconflictd
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%res = call <16 x i32> @llvm.x86.avx512.mask.conflict.d.512(<16 x i32> %a, <16 x i32> zeroinitializer, i16 -1)
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ret <16 x i32> %res
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}
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declare <16 x i32> @llvm.x86.avx512.mask.conflict.d.512(<16 x i32>, <16 x i32>, i16) nounwind readonly
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define <8 x i64> @test_conflict_q(<8 x i64> %a) {
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; CHECK: movb $-1, %al
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; CHECK: vpxor
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; CHECK: vpconflictq
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%res = call <8 x i64> @llvm.x86.avx512.mask.conflict.q.512(<8 x i64> %a, <8 x i64> zeroinitializer, i8 -1)
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ret <8 x i64> %res
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}
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declare <8 x i64> @llvm.x86.avx512.mask.conflict.q.512(<8 x i64>, <8 x i64>, i8) nounwind readonly
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define <16 x i32> @test_maskz_conflict_d(<16 x i32> %a, i16 %mask) {
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; CHECK: vpconflictd
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.conflict.d.512(<16 x i32> %a, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_conflict_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
|
|
; CHECK: vpconflictq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.conflict.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <16 x i32> @test_lzcnt_d(<16 x i32> %a) {
|
|
; CHECK: movw $-1, %ax
|
|
; CHECK: vpxor
|
|
; CHECK: vplzcntd
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.lzcnt.d.512(<16 x i32> %a, <16 x i32> zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.lzcnt.d.512(<16 x i32>, <16 x i32>, i16) nounwind readonly
|
|
|
|
define <8 x i64> @test_lzcnt_q(<8 x i64> %a) {
|
|
; CHECK: movb $-1, %al
|
|
; CHECK: vpxor
|
|
; CHECK: vplzcntq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.lzcnt.q.512(<8 x i64> %a, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.lzcnt.q.512(<8 x i64>, <8 x i64>, i8) nounwind readonly
|
|
|
|
|
|
define <16 x i32> @test_mask_lzcnt_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
|
|
; CHECK: vplzcntd
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.lzcnt.d.512(<16 x i32> %a, <16 x i32> %b, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_lzcnt_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
|
|
; CHECK: vplzcntq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.lzcnt.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <16 x i32> @test_ctlz_d(<16 x i32> %a) {
|
|
; CHECK-LABEL: test_ctlz_d
|
|
; CHECK: vplzcntd
|
|
%res = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.ctlz.v16i32(<16 x i32>, i1) nounwind readonly
|
|
|
|
define <8 x i64> @test_ctlz_q(<8 x i64> %a) {
|
|
; CHECK-LABEL: test_ctlz_q
|
|
; CHECK: vplzcntq
|
|
%res = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.ctlz.v8i64(<8 x i64>, i1) nounwind readonly
|
|
|
|
define <16 x float> @test_x86_mask_blend_ps_512(i16 %a0, <16 x float> %a1, <16 x float> %a2) {
|
|
; CHECK: vblendmps %zmm1, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.blend.ps.512(<16 x float> %a1, <16 x float> %a2, i16 %a0) ; <<16 x float>> [#uses=1]
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
declare <16 x float> @llvm.x86.avx512.mask.blend.ps.512(<16 x float>, <16 x float>, i16) nounwind readonly
|
|
|
|
define <8 x double> @test_x86_mask_blend_pd_512(i8 %a0, <8 x double> %a1, <8 x double> %a2) {
|
|
; CHECK: vblendmpd %zmm1, %zmm0
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.blend.pd.512(<8 x double> %a1, <8 x double> %a2, i8 %a0) ; <<8 x double>> [#uses=1]
|
|
ret <8 x double> %res
|
|
}
|
|
|
|
define <8 x double> @test_x86_mask_blend_pd_512_memop(<8 x double> %a, <8 x double>* %ptr, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_mask_blend_pd_512_memop
|
|
; CHECK: vblendmpd (%
|
|
%b = load <8 x double>, <8 x double>* %ptr
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.blend.pd.512(<8 x double> %a, <8 x double> %b, i8 %mask) ; <<8 x double>> [#uses=1]
|
|
ret <8 x double> %res
|
|
}
|
|
declare <8 x double> @llvm.x86.avx512.mask.blend.pd.512(<8 x double>, <8 x double>, i8) nounwind readonly
|
|
|
|
define <16 x i32> @test_x86_mask_blend_d_512(i16 %a0, <16 x i32> %a1, <16 x i32> %a2) {
|
|
; CHECK: vpblendmd
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.blend.d.512(<16 x i32> %a1, <16 x i32> %a2, i16 %a0) ; <<16 x i32>> [#uses=1]
|
|
ret <16 x i32> %res
|
|
}
|
|
declare <16 x i32> @llvm.x86.avx512.mask.blend.d.512(<16 x i32>, <16 x i32>, i16) nounwind readonly
|
|
|
|
define <8 x i64> @test_x86_mask_blend_q_512(i8 %a0, <8 x i64> %a1, <8 x i64> %a2) {
|
|
; CHECK: vpblendmq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.blend.q.512(<8 x i64> %a1, <8 x i64> %a2, i8 %a0) ; <<8 x i64>> [#uses=1]
|
|
ret <8 x i64> %res
|
|
}
|
|
declare <8 x i64> @llvm.x86.avx512.mask.blend.q.512(<8 x i64>, <8 x i64>, i8) nounwind readonly
|
|
|
|
define <8 x i32> @test_cvtpd2udq(<8 x double> %a) {
|
|
;CHECK: vcvtpd2udq {ru-sae}{{.*}}encoding: [0x62,0xf1,0xfc,0x58,0x79,0xc0]
|
|
%res = call <8 x i32> @llvm.x86.avx512.mask.cvtpd2udq.512(<8 x double> %a, <8 x i32>zeroinitializer, i8 -1, i32 2)
|
|
ret <8 x i32>%res
|
|
}
|
|
declare <8 x i32> @llvm.x86.avx512.mask.cvtpd2udq.512(<8 x double>, <8 x i32>, i8, i32)
|
|
|
|
define <16 x i32> @test_cvtps2udq(<16 x float> %a) {
|
|
;CHECK: vcvtps2udq {rd-sae}{{.*}}encoding: [0x62,0xf1,0x7c,0x38,0x79,0xc0]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.cvtps2udq.512(<16 x float> %a, <16 x i32>zeroinitializer, i16 -1, i32 1)
|
|
ret <16 x i32>%res
|
|
}
|
|
declare <16 x i32> @llvm.x86.avx512.mask.cvtps2udq.512(<16 x float>, <16 x i32>, i16, i32)
|
|
|
|
define i16 @test_cmpps(<16 x float> %a, <16 x float> %b) {
|
|
;CHECK: vcmpleps {sae}{{.*}}encoding: [0x62,0xf1,0x7c,0x18,0xc2,0xc1,0x02]
|
|
%res = call i16 @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> %a, <16 x float> %b, i32 2, i16 -1, i32 8)
|
|
ret i16 %res
|
|
}
|
|
declare i16 @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> , <16 x float> , i32, i16, i32)
|
|
|
|
define i8 @test_cmppd(<8 x double> %a, <8 x double> %b) {
|
|
;CHECK: vcmpneqpd %zmm{{.*}}encoding: [0x62,0xf1,0xfd,0x48,0xc2,0xc1,0x04]
|
|
%res = call i8 @llvm.x86.avx512.mask.cmp.pd.512(<8 x double> %a, <8 x double> %b, i32 4, i8 -1, i32 4)
|
|
ret i8 %res
|
|
}
|
|
declare i8 @llvm.x86.avx512.mask.cmp.pd.512(<8 x double> , <8 x double> , i32, i8, i32)
|
|
|
|
; cvt intrinsics
|
|
define <16 x float> @test_cvtdq2ps(<16 x i32> %a) {
|
|
;CHECK: vcvtdq2ps {rd-sae}{{.*}}encoding: [0x62,0xf1,0x7c,0x38,0x5b,0xc0]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.cvtdq2ps.512(<16 x i32> %a, <16 x float>zeroinitializer, i16 -1, i32 1)
|
|
ret <16 x float>%res
|
|
}
|
|
declare <16 x float> @llvm.x86.avx512.mask.cvtdq2ps.512(<16 x i32>, <16 x float>, i16, i32)
|
|
|
|
define <16 x float> @test_cvtudq2ps(<16 x i32> %a) {
|
|
;CHECK: vcvtudq2ps {rd-sae}{{.*}}encoding: [0x62,0xf1,0x7f,0x38,0x7a,0xc0]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.cvtudq2ps.512(<16 x i32> %a, <16 x float>zeroinitializer, i16 -1, i32 1)
|
|
ret <16 x float>%res
|
|
}
|
|
declare <16 x float> @llvm.x86.avx512.mask.cvtudq2ps.512(<16 x i32>, <16 x float>, i16, i32)
|
|
|
|
define <8 x double> @test_cvtdq2pd(<8 x i32> %a) {
|
|
;CHECK: vcvtdq2pd {{.*}}encoding: [0x62,0xf1,0x7e,0x48,0xe6,0xc0]
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.cvtdq2pd.512(<8 x i32> %a, <8 x double>zeroinitializer, i8 -1)
|
|
ret <8 x double>%res
|
|
}
|
|
declare <8 x double> @llvm.x86.avx512.mask.cvtdq2pd.512(<8 x i32>, <8 x double>, i8)
|
|
|
|
define <8 x double> @test_cvtudq2pd(<8 x i32> %a) {
|
|
;CHECK: vcvtudq2pd {{.*}}encoding: [0x62,0xf1,0x7e,0x48,0x7a,0xc0]
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.cvtudq2pd.512(<8 x i32> %a, <8 x double>zeroinitializer, i8 -1)
|
|
ret <8 x double>%res
|
|
}
|
|
declare <8 x double> @llvm.x86.avx512.mask.cvtudq2pd.512(<8 x i32>, <8 x double>, i8)
|
|
|
|
; fp min - max
|
|
define <8 x double> @test_vmaxpd(<8 x double> %a0, <8 x double> %a1) {
|
|
; CHECK: vmaxpd
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.max.pd.512(<8 x double> %a0, <8 x double> %a1,
|
|
<8 x double>zeroinitializer, i8 -1, i32 4)
|
|
ret <8 x double> %res
|
|
}
|
|
declare <8 x double> @llvm.x86.avx512.mask.max.pd.512(<8 x double>, <8 x double>,
|
|
<8 x double>, i8, i32)
|
|
|
|
define <8 x double> @test_vminpd(<8 x double> %a0, <8 x double> %a1) {
|
|
; CHECK: vminpd
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.min.pd.512(<8 x double> %a0, <8 x double> %a1,
|
|
<8 x double>zeroinitializer, i8 -1, i32 4)
|
|
ret <8 x double> %res
|
|
}
|
|
declare <8 x double> @llvm.x86.avx512.mask.min.pd.512(<8 x double>, <8 x double>,
|
|
<8 x double>, i8, i32)
|
|
|
|
define <8 x float> @test_cvtpd2ps(<8 x double> %a) {
|
|
;CHECK: vcvtpd2ps {rd-sae}{{.*}}encoding: [0x62,0xf1,0xfd,0x38,0x5a,0xc0]
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.cvtpd2ps.512(<8 x double> %a, <8 x float>zeroinitializer, i8 -1, i32 1)
|
|
ret <8 x float>%res
|
|
}
|
|
declare <8 x float> @llvm.x86.avx512.mask.cvtpd2ps.512(<8 x double>, <8 x float>, i8, i32)
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.pabs.d.512(<16 x i32>, <16 x i32>, i16)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_pabs_d_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vpabsd{{.*}}{%k1}
|
|
define <16 x i32>@test_int_x86_avx512_mask_pabs_d_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x2) {
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pabs.d.512(<16 x i32> %x0, <16 x i32> %x1, i16 %x2)
|
|
%res1 = call <16 x i32> @llvm.x86.avx512.mask.pabs.d.512(<16 x i32> %x0, <16 x i32> %x1, i16 -1)
|
|
%res2 = add <16 x i32> %res, %res1
|
|
ret <16 x i32> %res2
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.pabs.q.512(<8 x i64>, <8 x i64>, i8)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_pabs_q_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vpabsq{{.*}}{%k1}
|
|
define <8 x i64>@test_int_x86_avx512_mask_pabs_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2) {
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pabs.q.512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2)
|
|
%res1 = call <8 x i64> @llvm.x86.avx512.mask.pabs.q.512(<8 x i64> %x0, <8 x i64> %x1, i8 -1)
|
|
%res2 = add <8 x i64> %res, %res1
|
|
ret <8 x i64> %res2
|
|
}
|
|
|
|
define i8 @test_vptestmq(<8 x i64> %a0, <8 x i64> %a1) {
|
|
; CHECK: vptestmq {{.*}}encoding: [0x62,0xf2,0xfd,0x48,0x27,0xc1]
|
|
%res = call i8 @llvm.x86.avx512.mask.ptestm.q.512(<8 x i64> %a0, <8 x i64> %a1, i8 -1)
|
|
ret i8 %res
|
|
}
|
|
declare i8 @llvm.x86.avx512.mask.ptestm.q.512(<8 x i64>, <8 x i64>, i8)
|
|
|
|
define i16 @test_vptestmd(<16 x i32> %a0, <16 x i32> %a1) {
|
|
; CHECK: vptestmd {{.*}}encoding: [0x62,0xf2,0x7d,0x48,0x27,0xc1]
|
|
%res = call i16 @llvm.x86.avx512.mask.ptestm.d.512(<16 x i32> %a0, <16 x i32> %a1, i16 -1)
|
|
ret i16 %res
|
|
}
|
|
declare i16 @llvm.x86.avx512.mask.ptestm.d.512(<16 x i32>, <16 x i32>, i16)
|
|
|
|
define void @test_store1(<16 x float> %data, i8* %ptr, i16 %mask) {
|
|
; CHECK: vmovups {{.*}}encoding: [0x62,0xf1,0x7c,0x49,0x11,0x07]
|
|
call void @llvm.x86.avx512.mask.storeu.ps.512(i8* %ptr, <16 x float> %data, i16 %mask)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.x86.avx512.mask.storeu.ps.512(i8*, <16 x float>, i16 )
|
|
|
|
define void @test_store2(<8 x double> %data, i8* %ptr, i8 %mask) {
|
|
; CHECK: vmovupd {{.*}}encoding: [0x62,0xf1,0xfd,0x49,0x11,0x07]
|
|
call void @llvm.x86.avx512.mask.storeu.pd.512(i8* %ptr, <8 x double> %data, i8 %mask)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.x86.avx512.mask.storeu.pd.512(i8*, <8 x double>, i8)
|
|
|
|
define void @test_mask_store_aligned_ps(<16 x float> %data, i8* %ptr, i16 %mask) {
|
|
; CHECK-LABEL: test_mask_store_aligned_ps:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: kmovw %esi, %k1
|
|
; CHECK-NEXT: vmovaps %zmm0, (%rdi) {%k1}
|
|
; CHECK-NEXT: retq
|
|
call void @llvm.x86.avx512.mask.store.ps.512(i8* %ptr, <16 x float> %data, i16 %mask)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.x86.avx512.mask.store.ps.512(i8*, <16 x float>, i16 )
|
|
|
|
define void @test_mask_store_aligned_pd(<8 x double> %data, i8* %ptr, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_store_aligned_pd:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: kmovw %esi, %k1
|
|
; CHECK-NEXT: vmovapd %zmm0, (%rdi) {%k1}
|
|
; CHECK-NEXT: retq
|
|
call void @llvm.x86.avx512.mask.store.pd.512(i8* %ptr, <8 x double> %data, i8 %mask)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.x86.avx512.mask.store.pd.512(i8*, <8 x double>, i8)
|
|
|
|
define <16 x float> @test_maskz_load_aligned_ps(<16 x float> %data, i8* %ptr, i16 %mask) {
|
|
; CHECK-LABEL: test_maskz_load_aligned_ps:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: kmovw %esi, %k1
|
|
; CHECK-NEXT: vmovaps (%rdi), %zmm0 {%k1} {z}
|
|
; CHECK-NEXT: retq
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.load.ps.512(i8* %ptr, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
declare <16 x float> @llvm.x86.avx512.mask.load.ps.512(i8*, <16 x float>, i16)
|
|
|
|
define <8 x double> @test_maskz_load_aligned_pd(<8 x double> %data, i8* %ptr, i8 %mask) {
|
|
; CHECK-LABEL: test_maskz_load_aligned_pd:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: kmovw %esi, %k1
|
|
; CHECK-NEXT: vmovapd (%rdi), %zmm0 {%k1} {z}
|
|
; CHECK-NEXT: retq
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.load.pd.512(i8* %ptr, <8 x double> zeroinitializer, i8 %mask)
|
|
ret <8 x double> %res
|
|
}
|
|
|
|
declare <8 x double> @llvm.x86.avx512.mask.load.pd.512(i8*, <8 x double>, i8)
|
|
|
|
define <16 x float> @test_load_aligned_ps(<16 x float> %data, i8* %ptr, i16 %mask) {
|
|
; CHECK-LABEL: test_load_aligned_ps:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vmovaps (%rdi), %zmm0
|
|
; CHECK-NEXT: retq
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.load.ps.512(i8* %ptr, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <8 x double> @test_load_aligned_pd(<8 x double> %data, i8* %ptr, i8 %mask) {
|
|
; CHECK-LABEL: test_load_aligned_pd:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vmovapd (%rdi), %zmm0
|
|
; CHECK-NEXT: retq
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.load.pd.512(i8* %ptr, <8 x double> zeroinitializer, i8 -1)
|
|
ret <8 x double> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.movntdqa(i8*)
|
|
|
|
define <8 x i64> @test_valign_q(<8 x i64> %a, <8 x i64> %b) {
|
|
; CHECK-LABEL: test_valign_q:
|
|
; CHECK: valignq $2, %zmm1, %zmm0, %zmm0
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.valign.q.512(<8 x i64> %a, <8 x i64> %b, i8 2, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_valign_q(<8 x i64> %a, <8 x i64> %b, <8 x i64> %src, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_valign_q:
|
|
; CHECK: valignq $2, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.valign.q.512(<8 x i64> %a, <8 x i64> %b, i8 2, <8 x i64> %src, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.valign.q.512(<8 x i64>, <8 x i64>, i8, <8 x i64>, i8)
|
|
|
|
define <16 x i32> @test_maskz_valign_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
|
|
; CHECK-LABEL: test_maskz_valign_d:
|
|
; CHECK: valignd $5, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xc9,0x03,0xc1,0x05]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.valign.d.512(<16 x i32> %a, <16 x i32> %b, i8 5, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.valign.d.512(<16 x i32>, <16 x i32>, i8, <16 x i32>, i16)
|
|
|
|
define void @test_mask_store_ss(i8* %ptr, <4 x float> %data, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_store_ss
|
|
; CHECK: vmovss %xmm0, (%rdi) {%k1} ## encoding: [0x62,0xf1,0x7e,0x09,0x11,0x07]
|
|
call void @llvm.x86.avx512.mask.store.ss(i8* %ptr, <4 x float> %data, i8 %mask)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.x86.avx512.mask.store.ss(i8*, <4 x float>, i8 )
|
|
|
|
define i16 @test_pcmpeq_d(<16 x i32> %a, <16 x i32> %b) {
|
|
; CHECK-LABEL: test_pcmpeq_d
|
|
; CHECK: vpcmpeqd %zmm1, %zmm0, %k0 ##
|
|
%res = call i16 @llvm.x86.avx512.mask.pcmpeq.d.512(<16 x i32> %a, <16 x i32> %b, i16 -1)
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_mask_pcmpeq_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
|
|
; CHECK-LABEL: test_mask_pcmpeq_d
|
|
; CHECK: vpcmpeqd %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res = call i16 @llvm.x86.avx512.mask.pcmpeq.d.512(<16 x i32> %a, <16 x i32> %b, i16 %mask)
|
|
ret i16 %res
|
|
}
|
|
|
|
declare i16 @llvm.x86.avx512.mask.pcmpeq.d.512(<16 x i32>, <16 x i32>, i16)
|
|
|
|
define i8 @test_pcmpeq_q(<8 x i64> %a, <8 x i64> %b) {
|
|
; CHECK-LABEL: test_pcmpeq_q
|
|
; CHECK: vpcmpeqq %zmm1, %zmm0, %k0 ##
|
|
%res = call i8 @llvm.x86.avx512.mask.pcmpeq.q.512(<8 x i64> %a, <8 x i64> %b, i8 -1)
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @test_mask_pcmpeq_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_pcmpeq_q
|
|
; CHECK: vpcmpeqq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res = call i8 @llvm.x86.avx512.mask.pcmpeq.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask)
|
|
ret i8 %res
|
|
}
|
|
|
|
declare i8 @llvm.x86.avx512.mask.pcmpeq.q.512(<8 x i64>, <8 x i64>, i8)
|
|
|
|
define i16 @test_pcmpgt_d(<16 x i32> %a, <16 x i32> %b) {
|
|
; CHECK-LABEL: test_pcmpgt_d
|
|
; CHECK: vpcmpgtd %zmm1, %zmm0, %k0 ##
|
|
%res = call i16 @llvm.x86.avx512.mask.pcmpgt.d.512(<16 x i32> %a, <16 x i32> %b, i16 -1)
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_mask_pcmpgt_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
|
|
; CHECK-LABEL: test_mask_pcmpgt_d
|
|
; CHECK: vpcmpgtd %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res = call i16 @llvm.x86.avx512.mask.pcmpgt.d.512(<16 x i32> %a, <16 x i32> %b, i16 %mask)
|
|
ret i16 %res
|
|
}
|
|
|
|
declare i16 @llvm.x86.avx512.mask.pcmpgt.d.512(<16 x i32>, <16 x i32>, i16)
|
|
|
|
define i8 @test_pcmpgt_q(<8 x i64> %a, <8 x i64> %b) {
|
|
; CHECK-LABEL: test_pcmpgt_q
|
|
; CHECK: vpcmpgtq %zmm1, %zmm0, %k0 ##
|
|
%res = call i8 @llvm.x86.avx512.mask.pcmpgt.q.512(<8 x i64> %a, <8 x i64> %b, i8 -1)
|
|
ret i8 %res
|
|
}
|
|
|
|
define i8 @test_mask_pcmpgt_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_pcmpgt_q
|
|
; CHECK: vpcmpgtq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res = call i8 @llvm.x86.avx512.mask.pcmpgt.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask)
|
|
ret i8 %res
|
|
}
|
|
|
|
declare i8 @llvm.x86.avx512.mask.pcmpgt.q.512(<8 x i64>, <8 x i64>, i8)
|
|
|
|
define <8 x i16> @test_cmp_d_512(<16 x i32> %a0, <16 x i32> %a1) {
|
|
; CHECK_LABEL: test_cmp_d_512
|
|
; CHECK: vpcmpeqd %zmm1, %zmm0, %k0 ##
|
|
%res0 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 0, i16 -1)
|
|
%vec0 = insertelement <8 x i16> undef, i16 %res0, i32 0
|
|
; CHECK: vpcmpltd %zmm1, %zmm0, %k0 ##
|
|
%res1 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 1, i16 -1)
|
|
%vec1 = insertelement <8 x i16> %vec0, i16 %res1, i32 1
|
|
; CHECK: vpcmpled %zmm1, %zmm0, %k0 ##
|
|
%res2 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 2, i16 -1)
|
|
%vec2 = insertelement <8 x i16> %vec1, i16 %res2, i32 2
|
|
; CHECK: vpcmpunordd %zmm1, %zmm0, %k0 ##
|
|
%res3 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 3, i16 -1)
|
|
%vec3 = insertelement <8 x i16> %vec2, i16 %res3, i32 3
|
|
; CHECK: vpcmpneqd %zmm1, %zmm0, %k0 ##
|
|
%res4 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 4, i16 -1)
|
|
%vec4 = insertelement <8 x i16> %vec3, i16 %res4, i32 4
|
|
; CHECK: vpcmpnltd %zmm1, %zmm0, %k0 ##
|
|
%res5 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 5, i16 -1)
|
|
%vec5 = insertelement <8 x i16> %vec4, i16 %res5, i32 5
|
|
; CHECK: vpcmpnled %zmm1, %zmm0, %k0 ##
|
|
%res6 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 6, i16 -1)
|
|
%vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 6
|
|
; CHECK: vpcmpordd %zmm1, %zmm0, %k0 ##
|
|
%res7 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 7, i16 -1)
|
|
%vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
|
|
ret <8 x i16> %vec7
|
|
}
|
|
|
|
define <8 x i16> @test_mask_cmp_d_512(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
|
|
; CHECK_LABEL: test_mask_cmp_d_512
|
|
; CHECK: vpcmpeqd %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res0 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 0, i16 %mask)
|
|
%vec0 = insertelement <8 x i16> undef, i16 %res0, i32 0
|
|
; CHECK: vpcmpltd %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res1 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 1, i16 %mask)
|
|
%vec1 = insertelement <8 x i16> %vec0, i16 %res1, i32 1
|
|
; CHECK: vpcmpled %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res2 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 2, i16 %mask)
|
|
%vec2 = insertelement <8 x i16> %vec1, i16 %res2, i32 2
|
|
; CHECK: vpcmpunordd %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res3 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 3, i16 %mask)
|
|
%vec3 = insertelement <8 x i16> %vec2, i16 %res3, i32 3
|
|
; CHECK: vpcmpneqd %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res4 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 4, i16 %mask)
|
|
%vec4 = insertelement <8 x i16> %vec3, i16 %res4, i32 4
|
|
; CHECK: vpcmpnltd %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res5 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 5, i16 %mask)
|
|
%vec5 = insertelement <8 x i16> %vec4, i16 %res5, i32 5
|
|
; CHECK: vpcmpnled %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res6 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 6, i16 %mask)
|
|
%vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 6
|
|
; CHECK: vpcmpordd %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res7 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 7, i16 %mask)
|
|
%vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
|
|
ret <8 x i16> %vec7
|
|
}
|
|
|
|
declare i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32>, <16 x i32>, i32, i16) nounwind readnone
|
|
|
|
define <8 x i16> @test_ucmp_d_512(<16 x i32> %a0, <16 x i32> %a1) {
|
|
; CHECK_LABEL: test_ucmp_d_512
|
|
; CHECK: vpcmpequd %zmm1, %zmm0, %k0 ##
|
|
%res0 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 0, i16 -1)
|
|
%vec0 = insertelement <8 x i16> undef, i16 %res0, i32 0
|
|
; CHECK: vpcmpltud %zmm1, %zmm0, %k0 ##
|
|
%res1 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 1, i16 -1)
|
|
%vec1 = insertelement <8 x i16> %vec0, i16 %res1, i32 1
|
|
; CHECK: vpcmpleud %zmm1, %zmm0, %k0 ##
|
|
%res2 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 2, i16 -1)
|
|
%vec2 = insertelement <8 x i16> %vec1, i16 %res2, i32 2
|
|
; CHECK: vpcmpunordud %zmm1, %zmm0, %k0 ##
|
|
%res3 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 3, i16 -1)
|
|
%vec3 = insertelement <8 x i16> %vec2, i16 %res3, i32 3
|
|
; CHECK: vpcmpnequd %zmm1, %zmm0, %k0 ##
|
|
%res4 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 4, i16 -1)
|
|
%vec4 = insertelement <8 x i16> %vec3, i16 %res4, i32 4
|
|
; CHECK: vpcmpnltud %zmm1, %zmm0, %k0 ##
|
|
%res5 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 5, i16 -1)
|
|
%vec5 = insertelement <8 x i16> %vec4, i16 %res5, i32 5
|
|
; CHECK: vpcmpnleud %zmm1, %zmm0, %k0 ##
|
|
%res6 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 6, i16 -1)
|
|
%vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 6
|
|
; CHECK: vpcmpordud %zmm1, %zmm0, %k0 ##
|
|
%res7 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 7, i16 -1)
|
|
%vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
|
|
ret <8 x i16> %vec7
|
|
}
|
|
|
|
define <8 x i16> @test_mask_ucmp_d_512(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
|
|
; CHECK_LABEL: test_mask_ucmp_d_512
|
|
; CHECK: vpcmpequd %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res0 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 0, i16 %mask)
|
|
%vec0 = insertelement <8 x i16> undef, i16 %res0, i32 0
|
|
; CHECK: vpcmpltud %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res1 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 1, i16 %mask)
|
|
%vec1 = insertelement <8 x i16> %vec0, i16 %res1, i32 1
|
|
; CHECK: vpcmpleud %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res2 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 2, i16 %mask)
|
|
%vec2 = insertelement <8 x i16> %vec1, i16 %res2, i32 2
|
|
; CHECK: vpcmpunordud %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res3 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 3, i16 %mask)
|
|
%vec3 = insertelement <8 x i16> %vec2, i16 %res3, i32 3
|
|
; CHECK: vpcmpnequd %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res4 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 4, i16 %mask)
|
|
%vec4 = insertelement <8 x i16> %vec3, i16 %res4, i32 4
|
|
; CHECK: vpcmpnltud %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res5 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 5, i16 %mask)
|
|
%vec5 = insertelement <8 x i16> %vec4, i16 %res5, i32 5
|
|
; CHECK: vpcmpnleud %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res6 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 6, i16 %mask)
|
|
%vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 6
|
|
; CHECK: vpcmpordud %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res7 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 7, i16 %mask)
|
|
%vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
|
|
ret <8 x i16> %vec7
|
|
}
|
|
|
|
declare i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32>, <16 x i32>, i32, i16) nounwind readnone
|
|
|
|
define <8 x i8> @test_cmp_q_512(<8 x i64> %a0, <8 x i64> %a1) {
|
|
; CHECK_LABEL: test_cmp_q_512
|
|
; CHECK: vpcmpeqq %zmm1, %zmm0, %k0 ##
|
|
%res0 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 0, i8 -1)
|
|
%vec0 = insertelement <8 x i8> undef, i8 %res0, i32 0
|
|
; CHECK: vpcmpltq %zmm1, %zmm0, %k0 ##
|
|
%res1 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 1, i8 -1)
|
|
%vec1 = insertelement <8 x i8> %vec0, i8 %res1, i32 1
|
|
; CHECK: vpcmpleq %zmm1, %zmm0, %k0 ##
|
|
%res2 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 2, i8 -1)
|
|
%vec2 = insertelement <8 x i8> %vec1, i8 %res2, i32 2
|
|
; CHECK: vpcmpunordq %zmm1, %zmm0, %k0 ##
|
|
%res3 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 3, i8 -1)
|
|
%vec3 = insertelement <8 x i8> %vec2, i8 %res3, i32 3
|
|
; CHECK: vpcmpneqq %zmm1, %zmm0, %k0 ##
|
|
%res4 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 4, i8 -1)
|
|
%vec4 = insertelement <8 x i8> %vec3, i8 %res4, i32 4
|
|
; CHECK: vpcmpnltq %zmm1, %zmm0, %k0 ##
|
|
%res5 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 5, i8 -1)
|
|
%vec5 = insertelement <8 x i8> %vec4, i8 %res5, i32 5
|
|
; CHECK: vpcmpnleq %zmm1, %zmm0, %k0 ##
|
|
%res6 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 6, i8 -1)
|
|
%vec6 = insertelement <8 x i8> %vec5, i8 %res6, i32 6
|
|
; CHECK: vpcmpordq %zmm1, %zmm0, %k0 ##
|
|
%res7 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 7, i8 -1)
|
|
%vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
|
|
ret <8 x i8> %vec7
|
|
}
|
|
|
|
define <8 x i8> @test_mask_cmp_q_512(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
|
|
; CHECK_LABEL: test_mask_cmp_q_512
|
|
; CHECK: vpcmpeqq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res0 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 0, i8 %mask)
|
|
%vec0 = insertelement <8 x i8> undef, i8 %res0, i32 0
|
|
; CHECK: vpcmpltq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res1 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 1, i8 %mask)
|
|
%vec1 = insertelement <8 x i8> %vec0, i8 %res1, i32 1
|
|
; CHECK: vpcmpleq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res2 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 2, i8 %mask)
|
|
%vec2 = insertelement <8 x i8> %vec1, i8 %res2, i32 2
|
|
; CHECK: vpcmpunordq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res3 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 3, i8 %mask)
|
|
%vec3 = insertelement <8 x i8> %vec2, i8 %res3, i32 3
|
|
; CHECK: vpcmpneqq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res4 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 4, i8 %mask)
|
|
%vec4 = insertelement <8 x i8> %vec3, i8 %res4, i32 4
|
|
; CHECK: vpcmpnltq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res5 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 5, i8 %mask)
|
|
%vec5 = insertelement <8 x i8> %vec4, i8 %res5, i32 5
|
|
; CHECK: vpcmpnleq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res6 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 6, i8 %mask)
|
|
%vec6 = insertelement <8 x i8> %vec5, i8 %res6, i32 6
|
|
; CHECK: vpcmpordq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res7 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 7, i8 %mask)
|
|
%vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
|
|
ret <8 x i8> %vec7
|
|
}
|
|
|
|
declare i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64>, <8 x i64>, i32, i8) nounwind readnone
|
|
|
|
define <8 x i8> @test_ucmp_q_512(<8 x i64> %a0, <8 x i64> %a1) {
|
|
; CHECK_LABEL: test_ucmp_q_512
|
|
; CHECK: vpcmpequq %zmm1, %zmm0, %k0 ##
|
|
%res0 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 0, i8 -1)
|
|
%vec0 = insertelement <8 x i8> undef, i8 %res0, i32 0
|
|
; CHECK: vpcmpltuq %zmm1, %zmm0, %k0 ##
|
|
%res1 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 1, i8 -1)
|
|
%vec1 = insertelement <8 x i8> %vec0, i8 %res1, i32 1
|
|
; CHECK: vpcmpleuq %zmm1, %zmm0, %k0 ##
|
|
%res2 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 2, i8 -1)
|
|
%vec2 = insertelement <8 x i8> %vec1, i8 %res2, i32 2
|
|
; CHECK: vpcmpunorduq %zmm1, %zmm0, %k0 ##
|
|
%res3 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 3, i8 -1)
|
|
%vec3 = insertelement <8 x i8> %vec2, i8 %res3, i32 3
|
|
; CHECK: vpcmpnequq %zmm1, %zmm0, %k0 ##
|
|
%res4 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 4, i8 -1)
|
|
%vec4 = insertelement <8 x i8> %vec3, i8 %res4, i32 4
|
|
; CHECK: vpcmpnltuq %zmm1, %zmm0, %k0 ##
|
|
%res5 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 5, i8 -1)
|
|
%vec5 = insertelement <8 x i8> %vec4, i8 %res5, i32 5
|
|
; CHECK: vpcmpnleuq %zmm1, %zmm0, %k0 ##
|
|
%res6 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 6, i8 -1)
|
|
%vec6 = insertelement <8 x i8> %vec5, i8 %res6, i32 6
|
|
; CHECK: vpcmporduq %zmm1, %zmm0, %k0 ##
|
|
%res7 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 7, i8 -1)
|
|
%vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
|
|
ret <8 x i8> %vec7
|
|
}
|
|
|
|
define <8 x i8> @test_mask_ucmp_q_512(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
|
|
; CHECK_LABEL: test_mask_ucmp_q_512
|
|
; CHECK: vpcmpequq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res0 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 0, i8 %mask)
|
|
%vec0 = insertelement <8 x i8> undef, i8 %res0, i32 0
|
|
; CHECK: vpcmpltuq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res1 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 1, i8 %mask)
|
|
%vec1 = insertelement <8 x i8> %vec0, i8 %res1, i32 1
|
|
; CHECK: vpcmpleuq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res2 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 2, i8 %mask)
|
|
%vec2 = insertelement <8 x i8> %vec1, i8 %res2, i32 2
|
|
; CHECK: vpcmpunorduq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res3 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 3, i8 %mask)
|
|
%vec3 = insertelement <8 x i8> %vec2, i8 %res3, i32 3
|
|
; CHECK: vpcmpnequq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res4 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 4, i8 %mask)
|
|
%vec4 = insertelement <8 x i8> %vec3, i8 %res4, i32 4
|
|
; CHECK: vpcmpnltuq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res5 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 5, i8 %mask)
|
|
%vec5 = insertelement <8 x i8> %vec4, i8 %res5, i32 5
|
|
; CHECK: vpcmpnleuq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res6 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 6, i8 %mask)
|
|
%vec6 = insertelement <8 x i8> %vec5, i8 %res6, i32 6
|
|
; CHECK: vpcmporduq %zmm1, %zmm0, %k0 {%k1} ##
|
|
%res7 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 7, i8 %mask)
|
|
%vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
|
|
ret <8 x i8> %vec7
|
|
}
|
|
|
|
declare i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64>, <8 x i64>, i32, i8) nounwind readnone
|
|
|
|
define <4 x float> @test_mask_vextractf32x4(<4 x float> %b, <16 x float> %a, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_vextractf32x4:
|
|
; CHECK: vextractf32x4 $2, %zmm1, %xmm0 {%k1}
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.vextractf32x4.512(<16 x float> %a, i8 2, <4 x float> %b, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
declare <4 x float> @llvm.x86.avx512.mask.vextractf32x4.512(<16 x float>, i8, <4 x float>, i8)
|
|
|
|
define <4 x i64> @test_mask_vextracti64x4(<4 x i64> %b, <8 x i64> %a, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_vextracti64x4:
|
|
; CHECK: vextracti64x4 $2, %zmm1, %ymm0 {%k1}
|
|
%res = call <4 x i64> @llvm.x86.avx512.mask.vextracti64x4.512(<8 x i64> %a, i8 2, <4 x i64> %b, i8 %mask)
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
declare <4 x i64> @llvm.x86.avx512.mask.vextracti64x4.512(<8 x i64>, i8, <4 x i64>, i8)
|
|
|
|
define <4 x i32> @test_maskz_vextracti32x4(<16 x i32> %a, i8 %mask) {
|
|
; CHECK-LABEL: test_maskz_vextracti32x4:
|
|
; CHECK: vextracti32x4 $2, %zmm0, %xmm0 {%k1} {z}
|
|
%res = call <4 x i32> @llvm.x86.avx512.mask.vextracti32x4.512(<16 x i32> %a, i8 2, <4 x i32> zeroinitializer, i8 %mask)
|
|
ret <4 x i32> %res
|
|
}
|
|
|
|
declare <4 x i32> @llvm.x86.avx512.mask.vextracti32x4.512(<16 x i32>, i8, <4 x i32>, i8)
|
|
|
|
define <4 x double> @test_vextractf64x4(<8 x double> %a) {
|
|
; CHECK-LABEL: test_vextractf64x4:
|
|
; CHECK: vextractf64x4 $2, %zmm0, %ymm0 ##
|
|
%res = call <4 x double> @llvm.x86.avx512.mask.vextractf64x4.512(<8 x double> %a, i8 2, <4 x double> zeroinitializer, i8 -1)
|
|
ret <4 x double> %res
|
|
}
|
|
|
|
declare <4 x double> @llvm.x86.avx512.mask.vextractf64x4.512(<8 x double>, i8, <4 x double>, i8)
|
|
|
|
define <16 x i32> @test_x86_avx512_pslli_d(<16 x i32> %a0) {
|
|
; CHECK-LABEL: test_x86_avx512_pslli_d
|
|
; CHECK: vpslld
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pslli.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_mask_pslli_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_pslli_d
|
|
; CHECK: vpslld $7, %zmm0, %zmm1 {%k1}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pslli.d(<16 x i32> %a0, i32 7, <16 x i32> %a1, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_maskz_pslli_d(<16 x i32> %a0, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_pslli_d
|
|
; CHECK: vpslld $7, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pslli.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.pslli.d(<16 x i32>, i32, <16 x i32>, i16) nounwind readnone
|
|
|
|
define <8 x i64> @test_x86_avx512_pslli_q(<8 x i64> %a0) {
|
|
; CHECK-LABEL: test_x86_avx512_pslli_q
|
|
; CHECK: vpsllq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pslli.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_mask_pslli_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_pslli_q
|
|
; CHECK: vpsllq $7, %zmm0, %zmm1 {%k1}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pslli.q(<8 x i64> %a0, i32 7, <8 x i64> %a1, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_maskz_pslli_q(<8 x i64> %a0, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_pslli_q
|
|
; CHECK: vpsllq $7, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pslli.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.pslli.q(<8 x i64>, i32, <8 x i64>, i8) nounwind readnone
|
|
|
|
define <16 x i32> @test_x86_avx512_psrli_d(<16 x i32> %a0) {
|
|
; CHECK-LABEL: test_x86_avx512_psrli_d
|
|
; CHECK: vpsrld
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrli.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_mask_psrli_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psrli_d
|
|
; CHECK: vpsrld $7, %zmm0, %zmm1 {%k1}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrli.d(<16 x i32> %a0, i32 7, <16 x i32> %a1, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_maskz_psrli_d(<16 x i32> %a0, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psrli_d
|
|
; CHECK: vpsrld $7, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrli.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.psrli.d(<16 x i32>, i32, <16 x i32>, i16) nounwind readnone
|
|
|
|
define <8 x i64> @test_x86_avx512_psrli_q(<8 x i64> %a0) {
|
|
; CHECK-LABEL: test_x86_avx512_psrli_q
|
|
; CHECK: vpsrlq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrli.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_mask_psrli_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psrli_q
|
|
; CHECK: vpsrlq $7, %zmm0, %zmm1 {%k1}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrli.q(<8 x i64> %a0, i32 7, <8 x i64> %a1, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_maskz_psrli_q(<8 x i64> %a0, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psrli_q
|
|
; CHECK: vpsrlq $7, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrli.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.psrli.q(<8 x i64>, i32, <8 x i64>, i8) nounwind readnone
|
|
|
|
define <16 x i32> @test_x86_avx512_psrai_d(<16 x i32> %a0) {
|
|
; CHECK-LABEL: test_x86_avx512_psrai_d
|
|
; CHECK: vpsrad
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrai.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_mask_psrai_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psrai_d
|
|
; CHECK: vpsrad $7, %zmm0, %zmm1 {%k1}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrai.d(<16 x i32> %a0, i32 7, <16 x i32> %a1, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_maskz_psrai_d(<16 x i32> %a0, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psrai_d
|
|
; CHECK: vpsrad $7, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrai.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.psrai.d(<16 x i32>, i32, <16 x i32>, i16) nounwind readnone
|
|
|
|
define <8 x i64> @test_x86_avx512_psrai_q(<8 x i64> %a0) {
|
|
; CHECK-LABEL: test_x86_avx512_psrai_q
|
|
; CHECK: vpsraq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_mask_psrai_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psrai_q
|
|
; CHECK: vpsraq $7, %zmm0, %zmm1 {%k1}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64> %a0, i32 7, <8 x i64> %a1, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_maskz_psrai_q(<8 x i64> %a0, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psrai_q
|
|
; CHECK: vpsraq $7, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64>, i32, <8 x i64>, i8) nounwind readnone
|
|
|
|
define <16 x i32> @test_x86_avx512_psll_d(<16 x i32> %a0, <4 x i32> %a1) {
|
|
; CHECK-LABEL: test_x86_avx512_psll_d
|
|
; CHECK: vpslld
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psll.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_mask_psll_d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psll_d
|
|
; CHECK: vpslld %xmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psll.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_maskz_psll_d(<16 x i32> %a0, <4 x i32> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psll_d
|
|
; CHECK: vpslld %xmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psll.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.psll.d(<16 x i32>, <4 x i32>, <16 x i32>, i16) nounwind readnone
|
|
|
|
define <8 x i64> @test_x86_avx512_psll_q(<8 x i64> %a0, <2 x i64> %a1) {
|
|
; CHECK-LABEL: test_x86_avx512_psll_q
|
|
; CHECK: vpsllq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psll.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_mask_psll_q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psll_q
|
|
; CHECK: vpsllq %xmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psll.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_maskz_psll_q(<8 x i64> %a0, <2 x i64> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psll_q
|
|
; CHECK: vpsllq %xmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psll.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.psll.q(<8 x i64>, <2 x i64>, <8 x i64>, i8) nounwind readnone
|
|
|
|
define <16 x i32> @test_x86_avx512_psrl_d(<16 x i32> %a0, <4 x i32> %a1) {
|
|
; CHECK-LABEL: test_x86_avx512_psrl_d
|
|
; CHECK: vpsrld
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrl.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_mask_psrl_d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psrl_d
|
|
; CHECK: vpsrld %xmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrl.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_maskz_psrl_d(<16 x i32> %a0, <4 x i32> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psrl_d
|
|
; CHECK: vpsrld %xmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrl.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.psrl.d(<16 x i32>, <4 x i32>, <16 x i32>, i16) nounwind readnone
|
|
|
|
define <8 x i64> @test_x86_avx512_psrl_q(<8 x i64> %a0, <2 x i64> %a1) {
|
|
; CHECK-LABEL: test_x86_avx512_psrl_q
|
|
; CHECK: vpsrlq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrl.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_mask_psrl_q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psrl_q
|
|
; CHECK: vpsrlq %xmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrl.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_maskz_psrl_q(<8 x i64> %a0, <2 x i64> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psrl_q
|
|
; CHECK: vpsrlq %xmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrl.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.psrl.q(<8 x i64>, <2 x i64>, <8 x i64>, i8) nounwind readnone
|
|
|
|
define <16 x i32> @test_x86_avx512_psra_d(<16 x i32> %a0, <4 x i32> %a1) {
|
|
; CHECK-LABEL: test_x86_avx512_psra_d
|
|
; CHECK: vpsrad
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psra.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_mask_psra_d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psra_d
|
|
; CHECK: vpsrad %xmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psra.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_maskz_psra_d(<16 x i32> %a0, <4 x i32> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psra_d
|
|
; CHECK: vpsrad %xmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psra.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.psra.d(<16 x i32>, <4 x i32>, <16 x i32>, i16) nounwind readnone
|
|
|
|
define <8 x i64> @test_x86_avx512_psra_q(<8 x i64> %a0, <2 x i64> %a1) {
|
|
; CHECK-LABEL: test_x86_avx512_psra_q
|
|
; CHECK: vpsraq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psra.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_mask_psra_q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psra_q
|
|
; CHECK: vpsraq %xmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psra.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_maskz_psra_q(<8 x i64> %a0, <2 x i64> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psra_q
|
|
; CHECK: vpsraq %xmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psra.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.psra.q(<8 x i64>, <2 x i64>, <8 x i64>, i8) nounwind readnone
|
|
|
|
define <16 x i32> @test_x86_avx512_psllv_d(<16 x i32> %a0, <16 x i32> %a1) {
|
|
; CHECK-LABEL: test_x86_avx512_psllv_d
|
|
; CHECK: vpsllvd
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psllv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_mask_psllv_d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psllv_d
|
|
; CHECK: vpsllvd %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psllv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_maskz_psllv_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psllv_d
|
|
; CHECK: vpsllvd %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psllv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.psllv.d(<16 x i32>, <16 x i32>, <16 x i32>, i16) nounwind readnone
|
|
|
|
define <8 x i64> @test_x86_avx512_psllv_q(<8 x i64> %a0, <8 x i64> %a1) {
|
|
; CHECK-LABEL: test_x86_avx512_psllv_q
|
|
; CHECK: vpsllvq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psllv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_mask_psllv_q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psllv_q
|
|
; CHECK: vpsllvq %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psllv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_maskz_psllv_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psllv_q
|
|
; CHECK: vpsllvq %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psllv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.psllv.q(<8 x i64>, <8 x i64>, <8 x i64>, i8) nounwind readnone
|
|
|
|
|
|
define <16 x i32> @test_x86_avx512_psrav_d(<16 x i32> %a0, <16 x i32> %a1) {
|
|
; CHECK-LABEL: test_x86_avx512_psrav_d
|
|
; CHECK: vpsravd
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrav.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_mask_psrav_d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psrav_d
|
|
; CHECK: vpsravd %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrav.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_maskz_psrav_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psrav_d
|
|
; CHECK: vpsravd %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrav.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.psrav.d(<16 x i32>, <16 x i32>, <16 x i32>, i16) nounwind readnone
|
|
|
|
define <8 x i64> @test_x86_avx512_psrav_q(<8 x i64> %a0, <8 x i64> %a1) {
|
|
; CHECK-LABEL: test_x86_avx512_psrav_q
|
|
; CHECK: vpsravq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrav.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_mask_psrav_q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psrav_q
|
|
; CHECK: vpsravq %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrav.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_maskz_psrav_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psrav_q
|
|
; CHECK: vpsravq %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrav.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.psrav.q(<8 x i64>, <8 x i64>, <8 x i64>, i8) nounwind readnone
|
|
|
|
define <16 x i32> @test_x86_avx512_psrlv_d(<16 x i32> %a0, <16 x i32> %a1) {
|
|
; CHECK-LABEL: test_x86_avx512_psrlv_d
|
|
; CHECK: vpsrlvd
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrlv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_mask_psrlv_d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psrlv_d
|
|
; CHECK: vpsrlvd %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrlv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_x86_avx512_maskz_psrlv_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psrlv_d
|
|
; CHECK: vpsrlvd %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psrlv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.psrlv.d(<16 x i32>, <16 x i32>, <16 x i32>, i16) nounwind readnone
|
|
|
|
define <8 x i64> @test_x86_avx512_psrlv_q(<8 x i64> %a0, <8 x i64> %a1) {
|
|
; CHECK-LABEL: test_x86_avx512_psrlv_q
|
|
; CHECK: vpsrlvq
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_mask_psrlv_q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_mask_psrlv_q
|
|
; CHECK: vpsrlvq %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_x86_avx512_maskz_psrlv_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_x86_avx512_maskz_psrlv_q
|
|
; CHECK: vpsrlvq %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64>, <8 x i64>, <8 x i64>, i8) nounwind readnone
|
|
|
|
define <8 x i64> @test_x86_avx512_psrlv_q_memop(<8 x i64> %a0, <8 x i64>* %ptr) {
|
|
; CHECK-LABEL: test_x86_avx512_psrlv_q_memop
|
|
; CHECK: vpsrlvq (%
|
|
%b = load <8 x i64>, <8 x i64>* %ptr
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64> %a0, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
declare <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
|
|
declare <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
|
|
declare <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)
|
|
|
|
define <16 x float> @test_vsubps_rn(<16 x float> %a0, <16 x float> %a1) {
|
|
; CHECK-LABEL: test_vsubps_rn
|
|
; CHECK: vsubps {rn-sae}{{.*}} ## encoding: [0x62,0xf1,0x7c,0x18,0x5c,0xc1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> zeroinitializer, i16 -1, i32 0)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vsubps_rd(<16 x float> %a0, <16 x float> %a1) {
|
|
; CHECK-LABEL: test_vsubps_rd
|
|
; CHECK: vsubps {rd-sae}{{.*}} ## encoding: [0x62,0xf1,0x7c,0x38,0x5c,0xc1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> zeroinitializer, i16 -1, i32 1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vsubps_ru(<16 x float> %a0, <16 x float> %a1) {
|
|
; CHECK-LABEL: test_vsubps_ru
|
|
; CHECK: vsubps {ru-sae}{{.*}} ## encoding: [0x62,0xf1,0x7c,0x58,0x5c,0xc1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> zeroinitializer, i16 -1, i32 2)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vsubps_rz(<16 x float> %a0, <16 x float> %a1) {
|
|
; CHECK-LABEL: test_vsubps_rz
|
|
; CHECK: vsubps {rz-sae}{{.*}} ## encoding: [0x62,0xf1,0x7c,0x78,0x5c,0xc1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> zeroinitializer, i16 -1, i32 3)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vmulps_rn(<16 x float> %a0, <16 x float> %a1) {
|
|
; CHECK-LABEL: test_vmulps_rn
|
|
; CHECK: vmulps {rn-sae}{{.*}} ## encoding: [0x62,0xf1,0x7c,0x18,0x59,0xc1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> zeroinitializer, i16 -1, i32 0)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vmulps_rd(<16 x float> %a0, <16 x float> %a1) {
|
|
; CHECK-LABEL: test_vmulps_rd
|
|
; CHECK: vmulps {rd-sae}{{.*}} ## encoding: [0x62,0xf1,0x7c,0x38,0x59,0xc1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> zeroinitializer, i16 -1, i32 1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vmulps_ru(<16 x float> %a0, <16 x float> %a1) {
|
|
; CHECK-LABEL: test_vmulps_ru
|
|
; CHECK: vmulps {ru-sae}{{.*}} ## encoding: [0x62,0xf1,0x7c,0x58,0x59,0xc1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> zeroinitializer, i16 -1, i32 2)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vmulps_rz(<16 x float> %a0, <16 x float> %a1) {
|
|
; CHECK-LABEL: test_vmulps_rz
|
|
; CHECK: vmulps {rz-sae}{{.*}} ## encoding: [0x62,0xf1,0x7c,0x78,0x59,0xc1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> zeroinitializer, i16 -1, i32 3)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
;; mask float
|
|
define <16 x float> @test_vmulps_mask_rn(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_vmulps_mask_rn
|
|
; CHECK: vmulps {rn-sae}{{.*}}{%k1} {z} ## encoding: [0x62,0xf1,0x7c,0x99,0x59,0xc1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> zeroinitializer, i16 %mask, i32 0)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vmulps_mask_rd(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_vmulps_mask_rd
|
|
; CHECK: vmulps {rd-sae}{{.*}}{%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xb9,0x59,0xc1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> zeroinitializer, i16 %mask, i32 1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vmulps_mask_ru(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_vmulps_mask_ru
|
|
; CHECK: vmulps {ru-sae}{{.*}}{%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xd9,0x59,0xc1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> zeroinitializer, i16 %mask, i32 2)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vmulps_mask_rz(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
; CHECK-LABEL: test_vmulps_mask_rz
|
|
; CHECK: vmulps {rz-sae}{{.*}}{%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xf9,0x59,0xc1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> zeroinitializer, i16 %mask, i32 3)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
;; With Passthru value
|
|
define <16 x float> @test_vmulps_mask_passthru_rn(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) {
|
|
; CHECK-LABEL: test_vmulps_mask_passthru_rn
|
|
; CHECK: vmulps {rn-sae}{{.*}}{%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x59,0xd1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> %passthru, i16 %mask, i32 0)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vmulps_mask_passthru_rd(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) {
|
|
; CHECK-LABEL: test_vmulps_mask_passthru_rd
|
|
; CHECK: vmulps {rd-sae}{{.*}}{%k1} ## encoding: [0x62,0xf1,0x7c,0x39,0x59,0xd1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> %passthru, i16 %mask, i32 1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vmulps_mask_passthru_ru(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) {
|
|
; CHECK-LABEL: test_vmulps_mask_passthru_ru
|
|
; CHECK: vmulps {ru-sae}{{.*}}{%k1} ## encoding: [0x62,0xf1,0x7c,0x59,0x59,0xd1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> %passthru, i16 %mask, i32 2)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_vmulps_mask_passthru_rz(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) {
|
|
; CHECK-LABEL: test_vmulps_mask_passthru_rz
|
|
; CHECK: vmulps {rz-sae}{{.*}}{%k1} ## encoding: [0x62,0xf1,0x7c,0x79,0x59,0xd1]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
|
|
<16 x float> %passthru, i16 %mask, i32 3)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
;; mask double
|
|
define <8 x double> @test_vmulpd_mask_rn(<8 x double> %a0, <8 x double> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_vmulpd_mask_rn
|
|
; CHECK: vmulpd {rn-sae}{{.*}}{%k1} {z} ## encoding: [0x62,0xf1,0xfd,0x99,0x59,0xc1]
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double> %a0, <8 x double> %a1,
|
|
<8 x double> zeroinitializer, i8 %mask, i32 0)
|
|
ret <8 x double> %res
|
|
}
|
|
|
|
define <8 x double> @test_vmulpd_mask_rd(<8 x double> %a0, <8 x double> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_vmulpd_mask_rd
|
|
; CHECK: vmulpd {rd-sae}{{.*}}{%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xb9,0x59,0xc1]
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double> %a0, <8 x double> %a1,
|
|
<8 x double> zeroinitializer, i8 %mask, i32 1)
|
|
ret <8 x double> %res
|
|
}
|
|
|
|
define <8 x double> @test_vmulpd_mask_ru(<8 x double> %a0, <8 x double> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_vmulpd_mask_ru
|
|
; CHECK: vmulpd {ru-sae}{{.*}}{%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0x59,0xc1]
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double> %a0, <8 x double> %a1,
|
|
<8 x double> zeroinitializer, i8 %mask, i32 2)
|
|
ret <8 x double> %res
|
|
}
|
|
|
|
define <8 x double> @test_vmulpd_mask_rz(<8 x double> %a0, <8 x double> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_vmulpd_mask_rz
|
|
; CHECK: vmulpd {rz-sae}{{.*}}{%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xf9,0x59,0xc1]
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double> %a0, <8 x double> %a1,
|
|
<8 x double> zeroinitializer, i8 %mask, i32 3)
|
|
ret <8 x double> %res
|
|
}
|
|
|
|
define <16 x i32> @test_xor_epi32(<16 x i32> %a, <16 x i32> %b) {
|
|
;CHECK-LABEL: test_xor_epi32
|
|
;CHECK: vpxord {{.*}}encoding: [0x62,0xf1,0x7d,0x48,0xef,0xc1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pxor.d.512(<16 x i32> %a,<16 x i32> %b, <16 x i32>zeroinitializer, i16 -1)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_xor_epi32(<16 x i32> %a,<16 x i32> %b, <16 x i32> %passThru, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_xor_epi32
|
|
;CHECK: vpxord %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xef,0xd1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pxor.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.pxor.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
define <16 x i32> @test_or_epi32(<16 x i32> %a, <16 x i32> %b) {
|
|
;CHECK-LABEL: test_or_epi32
|
|
;CHECK: vpord {{.*}}encoding: [0x62,0xf1,0x7d,0x48,0xeb,0xc1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.por.d.512(<16 x i32> %a,<16 x i32> %b, <16 x i32>zeroinitializer, i16 -1)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_or_epi32(<16 x i32> %a,<16 x i32> %b, <16 x i32> %passThru, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_or_epi32
|
|
;CHECK: vpord %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xeb,0xd1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.por.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.por.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
define <16 x i32> @test_and_epi32(<16 x i32> %a, <16 x i32> %b) {
|
|
;CHECK-LABEL: test_and_epi32
|
|
;CHECK: vpandd {{.*}}encoding: [0x62,0xf1,0x7d,0x48,0xdb,0xc1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pand.d.512(<16 x i32> %a,<16 x i32> %b, <16 x i32>zeroinitializer, i16 -1)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_and_epi32(<16 x i32> %a,<16 x i32> %b, <16 x i32> %passThru, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_and_epi32
|
|
;CHECK: vpandd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xdb,0xd1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pand.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.pand.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
define <8 x i64> @test_xor_epi64(<8 x i64> %a, <8 x i64> %b) {
|
|
;CHECK-LABEL: test_xor_epi64
|
|
;CHECK: vpxorq {{.*}}encoding: [0x62,0xf1,0xfd,0x48,0xef,0xc1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pxor.q.512(<8 x i64> %a,<8 x i64> %b, <8 x i64>zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_xor_epi64(<8 x i64> %a,<8 x i64> %b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_xor_epi64
|
|
;CHECK: vpxorq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xef,0xd1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pxor.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.pxor.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
|
|
|
|
define <8 x i64> @test_or_epi64(<8 x i64> %a, <8 x i64> %b) {
|
|
;CHECK-LABEL: test_or_epi64
|
|
;CHECK: vporq {{.*}}encoding: [0x62,0xf1,0xfd,0x48,0xeb,0xc1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.por.q.512(<8 x i64> %a,<8 x i64> %b, <8 x i64>zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_or_epi64(<8 x i64> %a,<8 x i64> %b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_or_epi64
|
|
;CHECK: vporq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xeb,0xd1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.por.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.por.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
|
|
|
|
define <8 x i64> @test_and_epi64(<8 x i64> %a, <8 x i64> %b) {
|
|
;CHECK-LABEL: test_and_epi64
|
|
;CHECK: vpandq {{.*}}encoding: [0x62,0xf1,0xfd,0x48,0xdb,0xc1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pand.q.512(<8 x i64> %a,<8 x i64> %b, <8 x i64>zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_and_epi64(<8 x i64> %a,<8 x i64> %b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_and_epi64
|
|
;CHECK: vpandq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xdb,0xd1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pand.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.pand.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
|
|
|
|
|
|
define <16 x i32> @test_mask_add_epi32_rr(<16 x i32> %a, <16 x i32> %b) {
|
|
;CHECK-LABEL: test_mask_add_epi32_rr
|
|
;CHECK: vpaddd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xfe,0xc1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_add_epi32_rrk(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_add_epi32_rrk
|
|
;CHECK: vpaddd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xfe,0xd1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_add_epi32_rrkz(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_add_epi32_rrkz
|
|
;CHECK: vpaddd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xfe,0xc1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_add_epi32_rm(<16 x i32> %a, <16 x i32>* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_add_epi32_rm
|
|
;CHECK: vpaddd (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xfe,0x07]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_add_epi32_rmk(<16 x i32> %a, <16 x i32>* %ptr_b, <16 x i32> %passThru, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_add_epi32_rmk
|
|
;CHECK: vpaddd (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xfe,0x0f]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_add_epi32_rmkz(<16 x i32> %a, <16 x i32>* %ptr_b, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_add_epi32_rmkz
|
|
;CHECK: vpaddd (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xfe,0x07]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_add_epi32_rmb(<16 x i32> %a, i32* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_add_epi32_rmb
|
|
;CHECK: vpaddd (%rdi){1to16}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x58,0xfe,0x07]
|
|
%q = load i32, i32* %ptr_b
|
|
%vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
|
|
%b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_add_epi32_rmbk(<16 x i32> %a, i32* %ptr_b, <16 x i32> %passThru, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_add_epi32_rmbk
|
|
;CHECK: vpaddd (%rdi){1to16}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x59,0xfe,0x0f]
|
|
%q = load i32, i32* %ptr_b
|
|
%vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
|
|
%b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_add_epi32_rmbkz(<16 x i32> %a, i32* %ptr_b, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_add_epi32_rmbkz
|
|
;CHECK: vpaddd (%rdi){1to16}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xd9,0xfe,0x07]
|
|
%q = load i32, i32* %ptr_b
|
|
%vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
|
|
%b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
define <16 x i32> @test_mask_sub_epi32_rr(<16 x i32> %a, <16 x i32> %b) {
|
|
;CHECK-LABEL: test_mask_sub_epi32_rr
|
|
;CHECK: vpsubd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xfa,0xc1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_sub_epi32_rrk(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_sub_epi32_rrk
|
|
;CHECK: vpsubd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xfa,0xd1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_sub_epi32_rrkz(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_sub_epi32_rrkz
|
|
;CHECK: vpsubd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xfa,0xc1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_sub_epi32_rm(<16 x i32> %a, <16 x i32>* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_sub_epi32_rm
|
|
;CHECK: vpsubd (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xfa,0x07]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_sub_epi32_rmk(<16 x i32> %a, <16 x i32>* %ptr_b, <16 x i32> %passThru, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_sub_epi32_rmk
|
|
;CHECK: vpsubd (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xfa,0x0f]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_sub_epi32_rmkz(<16 x i32> %a, <16 x i32>* %ptr_b, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_sub_epi32_rmkz
|
|
;CHECK: vpsubd (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xfa,0x07]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_sub_epi32_rmb(<16 x i32> %a, i32* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_sub_epi32_rmb
|
|
;CHECK: vpsubd (%rdi){1to16}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x58,0xfa,0x07]
|
|
%q = load i32, i32* %ptr_b
|
|
%vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
|
|
%b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_sub_epi32_rmbk(<16 x i32> %a, i32* %ptr_b, <16 x i32> %passThru, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_sub_epi32_rmbk
|
|
;CHECK: vpsubd (%rdi){1to16}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x59,0xfa,0x0f]
|
|
%q = load i32, i32* %ptr_b
|
|
%vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
|
|
%b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_sub_epi32_rmbkz(<16 x i32> %a, i32* %ptr_b, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_sub_epi32_rmbkz
|
|
;CHECK: vpsubd (%rdi){1to16}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xd9,0xfa,0x07]
|
|
%q = load i32, i32* %ptr_b
|
|
%vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
|
|
%b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
define <8 x i64> @test_mask_add_epi64_rr(<8 x i64> %a, <8 x i64> %b) {
|
|
;CHECK-LABEL: test_mask_add_epi64_rr
|
|
;CHECK: vpaddq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xd4,0xc1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_add_epi64_rrk(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_add_epi64_rrk
|
|
;CHECK: vpaddq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xd4,0xd1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_add_epi64_rrkz(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_add_epi64_rrkz
|
|
;CHECK: vpaddq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xd4,0xc1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_add_epi64_rm(<8 x i64> %a, <8 x i64>* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_add_epi64_rm
|
|
;CHECK: vpaddq (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xd4,0x07]
|
|
%b = load <8 x i64>, <8 x i64>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_add_epi64_rmk(<8 x i64> %a, <8 x i64>* %ptr_b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_add_epi64_rmk
|
|
;CHECK: vpaddq (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xd4,0x0f]
|
|
%b = load <8 x i64>, <8 x i64>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_add_epi64_rmkz(<8 x i64> %a, <8 x i64>* %ptr_b, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_add_epi64_rmkz
|
|
;CHECK: vpaddq (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xd4,0x07]
|
|
%b = load <8 x i64>, <8 x i64>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_add_epi64_rmb(<8 x i64> %a, i64* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_add_epi64_rmb
|
|
;CHECK: vpaddq (%rdi){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x58,0xd4,0x07]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_add_epi64_rmbk(<8 x i64> %a, i64* %ptr_b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_add_epi64_rmbk
|
|
;CHECK: vpaddq (%rdi){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x59,0xd4,0x0f]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_add_epi64_rmbkz(<8 x i64> %a, i64* %ptr_b, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_add_epi64_rmbkz
|
|
;CHECK: vpaddq (%rdi){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0xd4,0x07]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
|
|
|
|
define <8 x i64> @test_mask_sub_epi64_rr(<8 x i64> %a, <8 x i64> %b) {
|
|
;CHECK-LABEL: test_mask_sub_epi64_rr
|
|
;CHECK: vpsubq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xfb,0xc1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_sub_epi64_rrk(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_sub_epi64_rrk
|
|
;CHECK: vpsubq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xfb,0xd1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_sub_epi64_rrkz(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_sub_epi64_rrkz
|
|
;CHECK: vpsubq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xfb,0xc1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_sub_epi64_rm(<8 x i64> %a, <8 x i64>* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_sub_epi64_rm
|
|
;CHECK: vpsubq (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xfb,0x07]
|
|
%b = load <8 x i64>, <8 x i64>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_sub_epi64_rmk(<8 x i64> %a, <8 x i64>* %ptr_b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_sub_epi64_rmk
|
|
;CHECK: vpsubq (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xfb,0x0f]
|
|
%b = load <8 x i64>, <8 x i64>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_sub_epi64_rmkz(<8 x i64> %a, <8 x i64>* %ptr_b, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_sub_epi64_rmkz
|
|
;CHECK: vpsubq (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xfb,0x07]
|
|
%b = load <8 x i64>, <8 x i64>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_sub_epi64_rmb(<8 x i64> %a, i64* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_sub_epi64_rmb
|
|
;CHECK: vpsubq (%rdi){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x58,0xfb,0x07]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_sub_epi64_rmbk(<8 x i64> %a, i64* %ptr_b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_sub_epi64_rmbk
|
|
;CHECK: vpsubq (%rdi){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x59,0xfb,0x0f]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_sub_epi64_rmbkz(<8 x i64> %a, i64* %ptr_b, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_sub_epi64_rmbkz
|
|
;CHECK: vpsubq (%rdi){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0xfb,0x07]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
|
|
|
|
define <8 x i64> @test_mask_mul_epi32_rr(<16 x i32> %a, <16 x i32> %b) {
|
|
;CHECK-LABEL: test_mask_mul_epi32_rr
|
|
;CHECK: vpmuldq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x28,0xc1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epi32_rrk(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_mul_epi32_rrk
|
|
;CHECK: vpmuldq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x28,0xd1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epi32_rrkz(<16 x i32> %a, <16 x i32> %b, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_mul_epi32_rrkz
|
|
;CHECK: vpmuldq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x28,0xc1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epi32_rm(<16 x i32> %a, <16 x i32>* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_mul_epi32_rm
|
|
;CHECK: vpmuldq (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x28,0x07]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epi32_rmk(<16 x i32> %a, <16 x i32>* %ptr_b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_mul_epi32_rmk
|
|
;CHECK: vpmuldq (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x28,0x0f]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epi32_rmkz(<16 x i32> %a, <16 x i32>* %ptr_b, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_mul_epi32_rmkz
|
|
;CHECK: vpmuldq (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x28,0x07]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epi32_rmb(<16 x i32> %a, i64* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_mul_epi32_rmb
|
|
;CHECK: vpmuldq (%rdi){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x58,0x28,0x07]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%b = bitcast <8 x i64> %b64 to <16 x i32>
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epi32_rmbk(<16 x i32> %a, i64* %ptr_b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_mul_epi32_rmbk
|
|
;CHECK: vpmuldq (%rdi){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0x28,0x0f]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%b = bitcast <8 x i64> %b64 to <16 x i32>
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epi32_rmbkz(<16 x i32> %a, i64* %ptr_b, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_mul_epi32_rmbkz
|
|
;CHECK: vpmuldq (%rdi){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xd9,0x28,0x07]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%b = bitcast <8 x i64> %b64 to <16 x i32>
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32>, <16 x i32>, <8 x i64>, i8)
|
|
|
|
define <8 x i64> @test_mask_mul_epu32_rr(<16 x i32> %a, <16 x i32> %b) {
|
|
;CHECK-LABEL: test_mask_mul_epu32_rr
|
|
;CHECK: vpmuludq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xf4,0xc1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epu32_rrk(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_mul_epu32_rrk
|
|
;CHECK: vpmuludq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xf4,0xd1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epu32_rrkz(<16 x i32> %a, <16 x i32> %b, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_mul_epu32_rrkz
|
|
;CHECK: vpmuludq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xf4,0xc1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epu32_rm(<16 x i32> %a, <16 x i32>* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_mul_epu32_rm
|
|
;CHECK: vpmuludq (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xf4,0x07]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epu32_rmk(<16 x i32> %a, <16 x i32>* %ptr_b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_mul_epu32_rmk
|
|
;CHECK: vpmuludq (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xf4,0x0f]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epu32_rmkz(<16 x i32> %a, <16 x i32>* %ptr_b, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_mul_epu32_rmkz
|
|
;CHECK: vpmuludq (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xf4,0x07]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epu32_rmb(<16 x i32> %a, i64* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_mul_epu32_rmb
|
|
;CHECK: vpmuludq (%rdi){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x58,0xf4,0x07]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%b = bitcast <8 x i64> %b64 to <16 x i32>
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epu32_rmbk(<16 x i32> %a, i64* %ptr_b, <8 x i64> %passThru, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_mul_epu32_rmbk
|
|
;CHECK: vpmuludq (%rdi){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x59,0xf4,0x0f]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%b = bitcast <8 x i64> %b64 to <16 x i32>
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mul_epu32_rmbkz(<16 x i32> %a, i64* %ptr_b, i8 %mask) {
|
|
;CHECK-LABEL: test_mask_mul_epu32_rmbkz
|
|
;CHECK: vpmuludq (%rdi){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0xf4,0x07]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%b = bitcast <8 x i64> %b64 to <16 x i32>
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret < 8 x i64> %res
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32>, <16 x i32>, <8 x i64>, i8)
|
|
|
|
define <16 x i32> @test_mask_mullo_epi32_rr_512(<16 x i32> %a, <16 x i32> %b) {
|
|
;CHECK-LABEL: test_mask_mullo_epi32_rr_512
|
|
;CHECK: vpmulld %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x40,0xc1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_mullo_epi32_rrk_512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_mullo_epi32_rrk_512
|
|
;CHECK: vpmulld %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x40,0xd1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_mullo_epi32_rrkz_512(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_mullo_epi32_rrkz_512
|
|
;CHECK: vpmulld %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x40,0xc1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_mullo_epi32_rm_512(<16 x i32> %a, <16 x i32>* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_mullo_epi32_rm_512
|
|
;CHECK: vpmulld (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x40,0x07]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_mullo_epi32_rmk_512(<16 x i32> %a, <16 x i32>* %ptr_b, <16 x i32> %passThru, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_mullo_epi32_rmk_512
|
|
;CHECK: vpmulld (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x40,0x0f]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_mullo_epi32_rmkz_512(<16 x i32> %a, <16 x i32>* %ptr_b, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_mullo_epi32_rmkz_512
|
|
;CHECK: vpmulld (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x40,0x07]
|
|
%b = load <16 x i32>, <16 x i32>* %ptr_b
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_mullo_epi32_rmb_512(<16 x i32> %a, i32* %ptr_b) {
|
|
;CHECK-LABEL: test_mask_mullo_epi32_rmb_512
|
|
;CHECK: vpmulld (%rdi){1to16}, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x58,0x40,0x07]
|
|
%q = load i32, i32* %ptr_b
|
|
%vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
|
|
%b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_mullo_epi32_rmbk_512(<16 x i32> %a, i32* %ptr_b, <16 x i32> %passThru, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_mullo_epi32_rmbk_512
|
|
;CHECK: vpmulld (%rdi){1to16}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x59,0x40,0x0f]
|
|
%q = load i32, i32* %ptr_b
|
|
%vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
|
|
%b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
define <16 x i32> @test_mask_mullo_epi32_rmbkz_512(<16 x i32> %a, i32* %ptr_b, i16 %mask) {
|
|
;CHECK-LABEL: test_mask_mullo_epi32_rmbkz_512
|
|
;CHECK: vpmulld (%rdi){1to16}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xd9,0x40,0x07]
|
|
%q = load i32, i32* %ptr_b
|
|
%vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
|
|
%b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
|
|
ret < 16 x i32> %res
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
define <16 x float> @test_mm512_maskz_add_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_add_round_ps_rn_sae
|
|
;CHECK: vaddps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 0)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_maskz_add_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_add_round_ps_rd_sae
|
|
;CHECK: vaddps {rd-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 1)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_maskz_add_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_add_round_ps_ru_sae
|
|
;CHECK: vaddps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 2)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_maskz_add_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_add_round_ps_rz_sae
|
|
;CHECK: vaddps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 3)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
|
|
define <16 x float> @test_mm512_maskz_add_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_add_round_ps_current
|
|
;CHECK: vaddps %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_mask_add_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_add_round_ps_rn_sae
|
|
;CHECK: vaddps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 0)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_mask_add_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_add_round_ps_rd_sae
|
|
;CHECK: vaddps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 1)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_mask_add_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_add_round_ps_ru_sae
|
|
;CHECK: vaddps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 2)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_mask_add_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_add_round_ps_rz_sae
|
|
;CHECK: vaddps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 3)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
|
|
define <16 x float> @test_mm512_mask_add_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_add_round_ps_current
|
|
;CHECK: vaddps %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
|
|
define <16 x float> @test_mm512_add_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_add_round_ps_rn_sae
|
|
;CHECK: vaddps {rn-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 0)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_add_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_add_round_ps_rd_sae
|
|
;CHECK: vaddps {rd-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 1)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_add_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_add_round_ps_ru_sae
|
|
;CHECK: vaddps {ru-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 2)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_add_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_add_round_ps_rz_sae
|
|
;CHECK: vaddps {rz-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 3)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_add_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_add_round_ps_current
|
|
;CHECK: vaddps %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
declare <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
|
|
|
|
define <16 x float> @test_mm512_mask_sub_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_sub_round_ps_rn_sae
|
|
;CHECK: vsubps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 0)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_mask_sub_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_sub_round_ps_rd_sae
|
|
;CHECK: vsubps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 1)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_mask_sub_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_sub_round_ps_ru_sae
|
|
;CHECK: vsubps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 2)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_mask_sub_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_sub_round_ps_rz_sae
|
|
;CHECK: vsubps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 3)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
|
|
define <16 x float> @test_mm512_mask_sub_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_sub_round_ps_current
|
|
;CHECK: vsubps %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_sub_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_sub_round_ps_rn_sae
|
|
;CHECK: vsubps {rn-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 0)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_sub_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_sub_round_ps_rd_sae
|
|
;CHECK: vsubps {rd-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 1)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_sub_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_sub_round_ps_ru_sae
|
|
;CHECK: vsubps {ru-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 2)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_sub_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_sub_round_ps_rz_sae
|
|
;CHECK: vsubps {rz-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 3)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_sub_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_sub_round_ps_current
|
|
;CHECK: vsubps %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_maskz_div_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_div_round_ps_rn_sae
|
|
;CHECK: vdivps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 0)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_maskz_div_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_div_round_ps_rd_sae
|
|
;CHECK: vdivps {rd-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 1)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_maskz_div_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_div_round_ps_ru_sae
|
|
;CHECK: vdivps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 2)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_maskz_div_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_div_round_ps_rz_sae
|
|
;CHECK: vdivps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 3)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
|
|
define <16 x float> @test_mm512_maskz_div_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_div_round_ps_current
|
|
;CHECK: vdivps %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_mask_div_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_div_round_ps_rn_sae
|
|
;CHECK: vdivps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 0)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_mask_div_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_div_round_ps_rd_sae
|
|
;CHECK: vdivps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 1)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_mask_div_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_div_round_ps_ru_sae
|
|
;CHECK: vdivps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 2)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_mask_div_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_div_round_ps_rz_sae
|
|
;CHECK: vdivps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 3)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
|
|
define <16 x float> @test_mm512_mask_div_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_div_round_ps_current
|
|
;CHECK: vdivps %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
|
|
define <16 x float> @test_mm512_div_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_div_round_ps_rn_sae
|
|
;CHECK: vdivps {rn-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 0)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_div_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_div_round_ps_rd_sae
|
|
;CHECK: vdivps {rd-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 1)
|
|
ret <16 x float> %res
|
|
}
|
|
define <16 x float> @test_mm512_div_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_div_round_ps_ru_sae
|
|
;CHECK: vdivps {ru-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 2)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_div_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_div_round_ps_rz_sae
|
|
;CHECK: vdivps {rz-sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 3)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_div_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_div_round_ps_current
|
|
;CHECK: vdivps %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
declare <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
|
|
|
|
define <16 x float> @test_mm512_maskz_min_round_ps_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_min_round_ps_sae
|
|
;CHECK: vminps {sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 8)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_maskz_min_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_min_round_ps_current
|
|
;CHECK: vminps %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_mask_min_round_ps_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_min_round_ps_sae
|
|
;CHECK: vminps {sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 8)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_mask_min_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_min_round_ps_current
|
|
;CHECK: vminps %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_min_round_ps_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_min_round_ps_sae
|
|
;CHECK: vminps {sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 8)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_min_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_min_round_ps_current
|
|
;CHECK: vminps %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
declare <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
|
|
|
|
define <16 x float> @test_mm512_maskz_max_round_ps_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_max_round_ps_sae
|
|
;CHECK: vmaxps {sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 8)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_maskz_max_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_maskz_max_round_ps_current
|
|
;CHECK: vmaxps %zmm1, %zmm0, %zmm0 {%k1} {z}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_mask_max_round_ps_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_max_round_ps_sae
|
|
;CHECK: vmaxps {sae}, %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 8)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_mask_max_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_mask_max_round_ps_current
|
|
;CHECK: vmaxps %zmm1, %zmm0, %zmm2 {%k1}
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_max_round_ps_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_max_round_ps_sae
|
|
;CHECK: vmaxps {sae}, %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 8)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mm512_max_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
|
|
;CHECK-LABEL: test_mm512_max_round_ps_current
|
|
;CHECK: vmaxps %zmm1, %zmm0, %zmm0
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 4)
|
|
ret <16 x float> %res
|
|
}
|
|
declare <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
|
|
|
|
declare <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>, <4 x float>, <4 x float>, i8, i32) nounwind readnone
|
|
|
|
define <4 x float> @test_mask_add_ss_rn(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_add_ss_rn
|
|
; CHECK: vaddss {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 0)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_add_ss_rd(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_add_ss_rd
|
|
; CHECK: vaddss {rd-sae}, %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 1)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_add_ss_ru(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_add_ss_ru
|
|
; CHECK: vaddss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 2)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_add_ss_rz(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_add_ss_rz
|
|
; CHECK: vaddss {rz-sae}, %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 3)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_add_ss_current(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_add_ss_current
|
|
; CHECK: vaddss %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 4)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_maskz_add_ss_rn(<4 x float> %a0, <4 x float> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_maskz_add_ss_rn
|
|
; CHECK: vaddss {rn-sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 %mask, i32 0)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_add_ss_rn(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: test_add_ss_rn
|
|
; CHECK: vaddss {rn-sae}, %xmm1, %xmm0, %xmm0
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1, i32 0)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
declare <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>, <2 x double>, <2 x double>, i8, i32) nounwind readnone
|
|
|
|
define <2 x double> @test_mask_add_sd_rn(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_add_sd_rn
|
|
; CHECK: vaddsd {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 0)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_mask_add_sd_rd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_add_sd_rd
|
|
; CHECK: vaddsd {rd-sae}, %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 1)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_mask_add_sd_ru(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_add_sd_ru
|
|
; CHECK: vaddsd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 2)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_mask_add_sd_rz(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_add_sd_rz
|
|
; CHECK: vaddsd {rz-sae}, %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 3)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_mask_add_sd_current(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_add_sd_current
|
|
; CHECK: vaddsd %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 4)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_maskz_add_sd_rn(<2 x double> %a0, <2 x double> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_maskz_add_sd_rn
|
|
; CHECK: vaddsd {rn-sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 %mask, i32 0)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_add_sd_rn(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: test_add_sd_rn
|
|
; CHECK: vaddsd {rn-sae}, %xmm1, %xmm0, %xmm0
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1, i32 0)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
declare <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>, <4 x float>, <4 x float>, i8, i32) nounwind readnone
|
|
|
|
define <4 x float> @test_mask_max_ss_sae(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_max_ss_sae
|
|
; CHECK: vmaxss {sae}, %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 8)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_maskz_max_ss_sae(<4 x float> %a0, <4 x float> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_maskz_max_ss_sae
|
|
; CHECK: vmaxss {sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 %mask, i32 8)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_max_ss_sae(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: test_max_ss_sae
|
|
; CHECK: vmaxss {sae}, %xmm1, %xmm0, %xmm0
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1, i32 8)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_max_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_max_ss
|
|
; CHECK: vmaxss %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 4)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_maskz_max_ss(<4 x float> %a0, <4 x float> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_maskz_max_ss
|
|
; CHECK: vmaxss %xmm1, %xmm0, %xmm0 {%k1} {z}
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 %mask, i32 4)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_max_ss(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: test_max_ss
|
|
; CHECK: vmaxss %xmm1, %xmm0, %xmm0
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1, i32 4)
|
|
ret <4 x float> %res
|
|
}
|
|
declare <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>, <2 x double>, <2 x double>, i8, i32) nounwind readnone
|
|
|
|
define <2 x double> @test_mask_max_sd_sae(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_max_sd_sae
|
|
; CHECK: vmaxsd {sae}, %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 8)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_maskz_max_sd_sae(<2 x double> %a0, <2 x double> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_maskz_max_sd_sae
|
|
; CHECK: vmaxsd {sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 %mask, i32 8)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_max_sd_sae(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: test_max_sd_sae
|
|
; CHECK: vmaxsd {sae}, %xmm1, %xmm0, %xmm0
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1, i32 8)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_mask_max_sd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {
|
|
; CHECK-LABEL: test_mask_max_sd
|
|
; CHECK: vmaxsd %xmm1, %xmm0, %xmm2 {%k1}
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 4)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_maskz_max_sd(<2 x double> %a0, <2 x double> %a1, i8 %mask) {
|
|
; CHECK-LABEL: test_maskz_max_sd
|
|
; CHECK: vmaxsd %xmm1, %xmm0, %xmm0 {%k1} {z}
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 %mask, i32 4)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_max_sd(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: test_max_sd
|
|
; CHECK: vmaxsd %xmm1, %xmm0, %xmm0
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1, i32 4)
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_x86_avx512_cvtsi2sd32(<2 x double> %a, i32 %b) {
|
|
; CHECK-LABEL: test_x86_avx512_cvtsi2sd32:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vcvtsi2sdl %edi, {rz-sae}, %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%res = call <2 x double> @llvm.x86.avx512.cvtsi2sd32(<2 x double> %a, i32 %b, i32 3) ; <<<2 x double>> [#uses=1]
|
|
ret <2 x double> %res
|
|
}
|
|
declare <2 x double> @llvm.x86.avx512.cvtsi2sd32(<2 x double>, i32, i32) nounwind readnone
|
|
|
|
define <2 x double> @test_x86_avx512_cvtsi2sd64(<2 x double> %a, i64 %b) {
|
|
; CHECK-LABEL: test_x86_avx512_cvtsi2sd64:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vcvtsi2sdq %rdi, {rz-sae}, %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%res = call <2 x double> @llvm.x86.avx512.cvtsi2sd64(<2 x double> %a, i64 %b, i32 3) ; <<<2 x double>> [#uses=1]
|
|
ret <2 x double> %res
|
|
}
|
|
declare <2 x double> @llvm.x86.avx512.cvtsi2sd64(<2 x double>, i64, i32) nounwind readnone
|
|
|
|
define <4 x float> @test_x86_avx512_cvtsi2ss32(<4 x float> %a, i32 %b) {
|
|
; CHECK-LABEL: test_x86_avx512_cvtsi2ss32:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vcvtsi2ssl %edi, {rz-sae}, %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%res = call <4 x float> @llvm.x86.avx512.cvtsi2ss32(<4 x float> %a, i32 %b, i32 3) ; <<<4 x float>> [#uses=1]
|
|
ret <4 x float> %res
|
|
}
|
|
declare <4 x float> @llvm.x86.avx512.cvtsi2ss32(<4 x float>, i32, i32) nounwind readnone
|
|
|
|
define <4 x float> @test_x86_avx512_cvtsi2ss64(<4 x float> %a, i64 %b) {
|
|
; CHECK-LABEL: test_x86_avx512_cvtsi2ss64:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vcvtsi2ssq %rdi, {rz-sae}, %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%res = call <4 x float> @llvm.x86.avx512.cvtsi2ss64(<4 x float> %a, i64 %b, i32 3) ; <<<4 x float>> [#uses=1]
|
|
ret <4 x float> %res
|
|
}
|
|
declare <4 x float> @llvm.x86.avx512.cvtsi2ss64(<4 x float>, i64, i32) nounwind readnone
|
|
|
|
define <4 x float> @test_x86_avx512__mm_cvt_roundu32_ss (<4 x float> %a, i32 %b)
|
|
; CHECK-LABEL: test_x86_avx512__mm_cvt_roundu32_ss:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vcvtusi2ssl %edi, {rd-sae}, %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
{
|
|
%res = call <4 x float> @llvm.x86.avx512.cvtusi2ss(<4 x float> %a, i32 %b, i32 1) ; <<<4 x float>> [#uses=1]
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_x86_avx512__mm_cvt_roundu32_ss_mem(<4 x float> %a, i32* %ptr)
|
|
; CHECK-LABEL: test_x86_avx512__mm_cvt_roundu32_ss_mem:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: movl (%rdi), %eax
|
|
; CHECK-NEXT: vcvtusi2ssl %eax, {rd-sae}, %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
{
|
|
%b = load i32, i32* %ptr
|
|
%res = call <4 x float> @llvm.x86.avx512.cvtusi2ss(<4 x float> %a, i32 %b, i32 1) ; <<<4 x float>> [#uses=1]
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_x86_avx512__mm_cvtu32_ss(<4 x float> %a, i32 %b)
|
|
; CHECK-LABEL: test_x86_avx512__mm_cvtu32_ss:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vcvtusi2ssl %edi, %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
{
|
|
%res = call <4 x float> @llvm.x86.avx512.cvtusi2ss(<4 x float> %a, i32 %b, i32 4) ; <<<4 x float>> [#uses=1]
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_x86_avx512__mm_cvtu32_ss_mem(<4 x float> %a, i32* %ptr)
|
|
; CHECK-LABEL: test_x86_avx512__mm_cvtu32_ss_mem:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vcvtusi2ssl (%rdi), %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
{
|
|
%b = load i32, i32* %ptr
|
|
%res = call <4 x float> @llvm.x86.avx512.cvtusi2ss(<4 x float> %a, i32 %b, i32 4) ; <<<4 x float>> [#uses=1]
|
|
ret <4 x float> %res
|
|
}
|
|
declare <4 x float> @llvm.x86.avx512.cvtusi2ss(<4 x float>, i32, i32) nounwind readnone
|
|
|
|
define <4 x float> @_mm_cvt_roundu64_ss (<4 x float> %a, i64 %b)
|
|
; CHECK-LABEL: _mm_cvt_roundu64_ss:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vcvtusi2ssq %rdi, {rd-sae}, %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
{
|
|
%res = call <4 x float> @llvm.x86.avx512.cvtusi642ss(<4 x float> %a, i64 %b, i32 1) ; <<<4 x float>> [#uses=1]
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @_mm_cvtu64_ss(<4 x float> %a, i64 %b)
|
|
; CHECK-LABEL: _mm_cvtu64_ss:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vcvtusi2ssq %rdi, %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
{
|
|
%res = call <4 x float> @llvm.x86.avx512.cvtusi642ss(<4 x float> %a, i64 %b, i32 4) ; <<<4 x float>> [#uses=1]
|
|
ret <4 x float> %res
|
|
}
|
|
declare <4 x float> @llvm.x86.avx512.cvtusi642ss(<4 x float>, i64, i32) nounwind readnone
|
|
|
|
define <2 x double> @test_x86_avx512_mm_cvtu32_sd(<2 x double> %a, i32 %b)
|
|
; CHECK-LABEL: test_x86_avx512_mm_cvtu32_sd:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vcvtusi2sdl %edi, %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
{
|
|
%res = call <2 x double> @llvm.x86.avx512.cvtusi2sd(<2 x double> %a, i32 %b) ; <<<2 x double>> [#uses=1]
|
|
ret <2 x double> %res
|
|
}
|
|
declare <2 x double> @llvm.x86.avx512.cvtusi2sd(<2 x double>, i32) nounwind readnone
|
|
|
|
define <2 x double> @test_x86_avx512_mm_cvtu64_sd(<2 x double> %a, i64 %b)
|
|
; CHECK-LABEL: test_x86_avx512_mm_cvtu64_sd:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vcvtusi2sdq %rdi, {rd-sae}, %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
{
|
|
%res = call <2 x double> @llvm.x86.avx512.cvtusi642sd(<2 x double> %a, i64 %b, i32 1) ; <<<2 x double>> [#uses=1]
|
|
ret <2 x double> %res
|
|
}
|
|
|
|
define <2 x double> @test_x86_avx512__mm_cvt_roundu64_sd(<2 x double> %a, i64 %b)
|
|
; CHECK-LABEL: test_x86_avx512__mm_cvt_roundu64_sd:
|
|
; CHECK: ## BB#0:
|
|
; CHECK-NEXT: vcvtusi2sdq %rdi, %xmm0, %xmm0
|
|
; CHECK-NEXT: retq
|
|
{
|
|
%res = call <2 x double> @llvm.x86.avx512.cvtusi642sd(<2 x double> %a, i64 %b, i32 4) ; <<<2 x double>> [#uses=1]
|
|
ret <2 x double> %res
|
|
}
|
|
declare <2 x double> @llvm.x86.avx512.cvtusi642sd(<2 x double>, i64, i32) nounwind readnone
|
|
|
|
define <8 x i64> @test_vpmaxq(<8 x i64> %a0, <8 x i64> %a1) {
|
|
; CHECK: vpmaxsq {{.*}}encoding: [0x62,0xf2,0xfd,0x48,0x3d,0xc1]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmaxs.q.512(<8 x i64> %a0, <8 x i64> %a1,
|
|
<8 x i64>zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
declare <8 x i64> @llvm.x86.avx512.mask.pmaxs.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
|
|
|
|
define <16 x i32> @test_vpminud(<16 x i32> %a0, <16 x i32> %a1) {
|
|
; CHECK: vpminud {{.*}}encoding: [0x62,0xf2,0x7d,0x48,0x3b,0xc1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pminu.d.512(<16 x i32> %a0, <16 x i32> %a1,
|
|
<16 x i32>zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
declare <16 x i32> @llvm.x86.avx512.mask.pminu.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
define <16 x i32> @test_vpmaxsd(<16 x i32> %a0, <16 x i32> %a1) {
|
|
; CHECK: vpmaxsd {{.*}}encoding: [0x62,0xf2,0x7d,0x48,0x3d,0xc1]
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmaxs.d.512(<16 x i32> %a0, <16 x i32> %a1,
|
|
<16 x i32>zeroinitializer, i16 -1)
|
|
ret <16 x i32> %res
|
|
}
|
|
declare <16 x i32> @llvm.x86.avx512.mask.pmaxs.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_pmaxs_d_512
|
|
; CHECK-NOT: call
|
|
; CHECK: vpmaxsd %zmm
|
|
; CHECK: {%k1}
|
|
define <16 x i32>@test_int_x86_avx512_mask_pmaxs_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmaxs.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
|
|
%res1 = call <16 x i32> @llvm.x86.avx512.mask.pmaxs.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
|
|
%res2 = add <16 x i32> %res, %res1
|
|
ret <16 x i32> %res2
|
|
}
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_pmaxs_q_512
|
|
; CHECK-NOT: call
|
|
; CHECK: vpmaxsq %zmm
|
|
; CHECK: {%k1}
|
|
define <8 x i64>@test_int_x86_avx512_mask_pmaxs_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmaxs.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
|
|
%res1 = call <8 x i64> @llvm.x86.avx512.mask.pmaxs.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
|
|
%res2 = add <8 x i64> %res, %res1
|
|
ret <8 x i64> %res2
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.pmaxu.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_pmaxu_d_512
|
|
; CHECK-NOT: call
|
|
; CHECK: vpmaxud %zmm
|
|
; CHECK: {%k1}
|
|
define <16 x i32>@test_int_x86_avx512_mask_pmaxu_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmaxu.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
|
|
%res1 = call <16 x i32> @llvm.x86.avx512.mask.pmaxu.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
|
|
%res2 = add <16 x i32> %res, %res1
|
|
ret <16 x i32> %res2
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.pmaxu.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_pmaxu_q_512
|
|
; CHECK-NOT: call
|
|
; CHECK: vpmaxuq %zmm
|
|
; CHECK: {%k1}
|
|
define <8 x i64>@test_int_x86_avx512_mask_pmaxu_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmaxu.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
|
|
%res1 = call <8 x i64> @llvm.x86.avx512.mask.pmaxu.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
|
|
%res2 = add <8 x i64> %res, %res1
|
|
ret <8 x i64> %res2
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.pmins.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_pmins_d_512
|
|
; CHECK-NOT: call
|
|
; CHECK: vpminsd %zmm
|
|
; CHECK: {%k1}
|
|
define <16 x i32>@test_int_x86_avx512_mask_pmins_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pmins.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
|
|
%res1 = call <16 x i32> @llvm.x86.avx512.mask.pmins.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
|
|
%res2 = add <16 x i32> %res, %res1
|
|
ret <16 x i32> %res2
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.pmins.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_pmins_q_512
|
|
; CHECK-NOT: call
|
|
; CHECK: vpminsq %zmm
|
|
; CHECK: {%k1}
|
|
define <8 x i64>@test_int_x86_avx512_mask_pmins_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmins.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
|
|
%res1 = call <8 x i64> @llvm.x86.avx512.mask.pmins.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
|
|
%res2 = add <8 x i64> %res, %res1
|
|
ret <8 x i64> %res2
|
|
}
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_pminu_d_512
|
|
; CHECK-NOT: call
|
|
; CHECK: vpminud %zmm
|
|
; CHECK: {%k1}
|
|
define <16 x i32>@test_int_x86_avx512_mask_pminu_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.pminu.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
|
|
%res1 = call <16 x i32> @llvm.x86.avx512.mask.pminu.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
|
|
%res2 = add <16 x i32> %res, %res1
|
|
ret <16 x i32> %res2
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.pminu.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_pminu_q_512
|
|
; CHECK-NOT: call
|
|
; CHECK: vpminuq %zmm
|
|
; CHECK: {%k1}
|
|
define <8 x i64>@test_int_x86_avx512_mask_pminu_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pminu.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
|
|
%res1 = call <8 x i64> @llvm.x86.avx512.mask.pminu.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
|
|
%res2 = add <8 x i64> %res, %res1
|
|
ret <8 x i64> %res2
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_vpermi2var_d_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vpermi2d {{.*}}{%k1}
|
|
define <16 x i32>@test_int_x86_avx512_mask_vpermi2var_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
|
|
%res1 = call <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
|
|
%res2 = add <16 x i32> %res, %res1
|
|
ret <16 x i32> %res2
|
|
}
|
|
|
|
declare <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double>, <8 x i64>, <8 x double>, i8)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_vpermi2var_pd_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vpermi2pd {{.*}}{%k1}
|
|
define <8 x double>@test_int_x86_avx512_mask_vpermi2var_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3) {
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3)
|
|
%res1 = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 -1)
|
|
%res2 = fadd <8 x double> %res, %res1
|
|
ret <8 x double> %res2
|
|
}
|
|
|
|
declare <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float>, <16 x i32>, <16 x float>, i16)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_vpermi2var_ps_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vpermi2ps {{.*}}{%k1}
|
|
define <16 x float>@test_int_x86_avx512_mask_vpermi2var_ps_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3) {
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3)
|
|
%res1 = call <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 -1)
|
|
%res2 = fadd <16 x float> %res, %res1
|
|
ret <16 x float> %res2
|
|
}
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_vpermi2var_q_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vpermi2q {{.*}}{%k1}
|
|
define <8 x i64>@test_int_x86_avx512_mask_vpermi2var_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
|
|
%res1 = call <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
|
|
%res2 = add <8 x i64> %res, %res1
|
|
ret <8 x i64> %res2
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermt2var_d_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vpermt2d {{.*}}{%k1} {z}
|
|
define <16 x i32>@test_int_x86_avx512_maskz_vpermt2var_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
|
|
%res = call <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
|
|
%res1 = call <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
|
|
%res2 = add <16 x i32> %res, %res1
|
|
ret <16 x i32> %res2
|
|
}
|
|
|
|
declare <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64>, <8 x double>, <8 x double>, i8)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermt2var_pd_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vpermt2pd {{.*}}{%k1} {z}
|
|
define <8 x double>@test_int_x86_avx512_maskz_vpermt2var_pd_512(<8 x i64> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3) {
|
|
%res = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3)
|
|
%res1 = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> %x0, <8 x double> %x1, <8 x double> %x2, i8 -1)
|
|
%res2 = fadd <8 x double> %res, %res1
|
|
ret <8 x double> %res2
|
|
}
|
|
|
|
declare <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32>, <16 x float>, <16 x float>, i16)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermt2var_ps_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vpermt2ps {{.*}}{%k1} {z}
|
|
define <16 x float>@test_int_x86_avx512_maskz_vpermt2var_ps_512(<16 x i32> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3) {
|
|
%res = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3)
|
|
%res1 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> %x0, <16 x float> %x1, <16 x float> %x2, i16 -1)
|
|
%res2 = fadd <16 x float> %res, %res1
|
|
ret <16 x float> %res2
|
|
}
|
|
|
|
|
|
declare <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermt2var_q_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vpermt2q {{.*}}{%k1} {z}
|
|
define <8 x i64>@test_int_x86_avx512_maskz_vpermt2var_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
|
|
%res = call <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
|
|
%res1 = call <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
|
|
%res2 = add <8 x i64> %res, %res1
|
|
ret <8 x i64> %res2
|
|
}
|
|
|
|
declare <16 x i32> @llvm.x86.avx512.mask.vpermt2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
|
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_vpermt2var_d_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vpermt2d {{.*}}{%k1}
|
|
; CHECK-NOT: {z}
|
|
define <16 x i32>@test_int_x86_avx512_mask_vpermt2var_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
|
|
%res = call <16 x i32> @llvm.x86.avx512.mask.vpermt2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
|
|
%res1 = call <16 x i32> @llvm.x86.avx512.mask.vpermt2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
|
|
%res2 = add <16 x i32> %res, %res1
|
|
ret <16 x i32> %res2
|
|
}
|
|
|
|
declare <8 x double> @llvm.x86.avx512.mask.scalef.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_scalef_pd_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vscalefpd{{.*}}{%k1}
|
|
define <8 x double>@test_int_x86_avx512_mask_scalef_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3) {
|
|
%res = call <8 x double> @llvm.x86.avx512.mask.scalef.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 3)
|
|
%res1 = call <8 x double> @llvm.x86.avx512.mask.scalef.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 -1, i32 0)
|
|
%res2 = fadd <8 x double> %res, %res1
|
|
ret <8 x double> %res2
|
|
}
|
|
|
|
declare <16 x float> @llvm.x86.avx512.mask.scalef.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
|
|
; CHECK-LABEL: @test_int_x86_avx512_mask_scalef_ps_512
|
|
; CHECK-NOT: call
|
|
; CHECK: kmov
|
|
; CHECK: vscalefps{{.*}}{%k1}
|
|
define <16 x float>@test_int_x86_avx512_mask_scalef_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3) {
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.scalef.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 2)
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%res1 = call <16 x float> @llvm.x86.avx512.mask.scalef.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 -1, i32 0)
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%res2 = fadd <16 x float> %res, %res1
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ret <16 x float> %res2
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}
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