forked from OSchip/llvm-project
80 lines
3.8 KiB
LLVM
80 lines
3.8 KiB
LLVM
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; RUN: opt -mtriple=thumbv8.1m.main -mve-tail-predication -tail-predication=enabled -mattr=+mve %s -S -o - | FileCheck %s
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; CHECK-LABEL: vec_mul_reduce_add
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; CHECK: vector.ph:
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; CHECK: call void @llvm.set.loop.iterations.i32
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; CHECK: br label %vector.body
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; CHECK: vector.body:
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; CHECK: [[ELTS:%[^ ]+]] = phi i32 [ %N, %vector.ph ], [ [[SUB:%[^ ]+]], %vector.body ]
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; CHECK: [[VCTP:%[^ ]+]] = call <4 x i1> @llvm.arm.mve.vctp32(i32 [[ELTS]])
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; CHECK: [[SUB]] = sub i32 [[ELTS]], 4
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; CHECK: call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* {{.*}}, i32 4, <4 x i1> [[VCTP]]
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; CHECK: call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* {{.*}}, i32 4, <4 x i1> [[VCTP]],
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; CHECK: middle.block:
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; CHECK: [[VPSEL:%[^ ]+]] = select <4 x i1> [[VCTP]],
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; CHECK: call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[VPSEL]])
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define i32 @vec_mul_reduce_add(i32* noalias nocapture readonly %a, i32* noalias nocapture readonly %b, i32 %N) {
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entry:
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%cmp8 = icmp eq i32 %N, 0
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%0 = add i32 %N, 3
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%1 = lshr i32 %0, 2
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%2 = shl nuw i32 %1, 2
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%3 = add i32 %2, -4
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%4 = lshr i32 %3, 2
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%5 = add nuw nsw i32 %4, 1
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br i1 %cmp8, label %for.cond.cleanup, label %vector.ph
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vector.ph: ; preds = %entry
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%trip.count.minus.1 = add i32 %N, -1
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%broadcast.splatinsert11 = insertelement <4 x i32> undef, i32 %trip.count.minus.1, i32 0
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%broadcast.splat12 = shufflevector <4 x i32> %broadcast.splatinsert11, <4 x i32> undef, <4 x i32> zeroinitializer
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call void @llvm.set.loop.iterations.i32(i32 %5)
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%lsr.iv2 = phi i32* [ %scevgep3, %vector.body ], [ %a, %vector.ph ]
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%lsr.iv = phi i32* [ %scevgep, %vector.body ], [ %b, %vector.ph ]
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%vec.phi = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %9, %vector.body ]
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%6 = phi i32 [ %5, %vector.ph ], [ %10, %vector.body ]
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%lsr.iv24 = bitcast i32* %lsr.iv2 to <4 x i32>*
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%lsr.iv1 = bitcast i32* %lsr.iv to <4 x i32>*
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%broadcast.splatinsert = insertelement <4 x i32> undef, i32 %index, i32 0
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%broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer
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%induction = add <4 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3>
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; %7 = icmp ule <4 x i32> %induction, %broadcast.splat12
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%7 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
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%wide.masked.load = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %lsr.iv24, i32 4, <4 x i1> %7, <4 x i32> undef)
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%wide.masked.load13 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %lsr.iv1, i32 4, <4 x i1> %7, <4 x i32> undef)
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%8 = mul nsw <4 x i32> %wide.masked.load13, %wide.masked.load
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%9 = add nsw <4 x i32> %8, %vec.phi
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%index.next = add i32 %index, 4
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%scevgep = getelementptr i32, i32* %lsr.iv, i32 4
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%scevgep3 = getelementptr i32, i32* %lsr.iv2, i32 4
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%10 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %6, i32 1)
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%11 = icmp ne i32 %10, 0
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br i1 %11, label %vector.body, label %middle.block
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middle.block: ; preds = %vector.body
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%12 = select <4 x i1> %7, <4 x i32> %9, <4 x i32> %vec.phi
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%13 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %12)
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br label %for.cond.cleanup
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for.cond.cleanup: ; preds = %middle.block, %entry
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%res.0.lcssa = phi i32 [ 0, %entry ], [ %13, %middle.block ]
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ret i32 %res.0.lcssa
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}
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declare <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>*, i32 immarg, <4 x i1>, <4 x i32>)
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declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>)
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declare void @llvm.set.loop.iterations.i32(i32)
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declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32)
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declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32)
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