forked from OSchip/llvm-project
128 lines
3.9 KiB
YAML
128 lines
3.9 KiB
YAML
# RUN: llc -mtriple=thumbv8.1m.main %s -run-pass=arm-low-overhead-loops --verify-machineinstrs -o - | FileCheck %s
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# CHECK: while.body:
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# CHECK-NOT: t2DLS
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# CHECK-NOT: t2LEUpdate
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--- |
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv8.1m.main"
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define i32 @mov_between_dec_end(i32 %n) #0 {
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entry:
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%cmp6 = icmp eq i32 %n, 0
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br i1 %cmp6, label %while.end, label %while.body.preheader
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while.body.preheader: ; preds = %entry
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call void @llvm.set.loop.iterations.i32(i32 %n)
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br label %while.body
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while.body: ; preds = %while.body, %while.body.preheader
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%0 = phi i32 [ %n, %while.body.preheader ], [ %1, %while.body ]
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%1 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %0, i32 1)
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%add = add i32 %1, 2
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%2 = icmp ne i32 %1, 0
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br i1 %2, label %while.body, label %while.end
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while.end: ; preds = %while.body, %entry
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%res.0.lcssa = phi i32 [ 0, %entry ], [ %add, %while.body ]
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ret i32 %res.0.lcssa
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}
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; Function Attrs: noduplicate nounwind
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declare void @llvm.set.loop.iterations.i32(i32) #1
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; Function Attrs: noduplicate nounwind
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declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #1
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; Function Attrs: nounwind
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declare void @llvm.stackprotector(i8*, i8**) #2
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attributes #0 = { "target-features"="+mve.fp" }
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attributes #1 = { noduplicate nounwind }
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attributes #2 = { nounwind }
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...
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---
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name: mov_between_dec_end
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alignment: 2
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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registers: []
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 8
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offsetAdjustment: 0
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maxAlignment: 4
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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maxCallFrameSize: 0
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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localFrameSize: 0
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savePoint: ''
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restorePoint: ''
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fixedStack: []
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stack:
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- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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callSites: []
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constants: []
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machineFunctionInfo: {}
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body: |
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bb.0.entry:
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successors: %bb.4(0x30000000), %bb.1(0x50000000)
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liveins: $r0, $r7, $lr
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frame-setup tPUSH 14, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp
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frame-setup CFI_INSTRUCTION def_cfa_offset 8
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frame-setup CFI_INSTRUCTION offset $lr, -4
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frame-setup CFI_INSTRUCTION offset $r7, -8
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tCBZ $r0, %bb.4
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bb.1.while.body.preheader:
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successors: %bb.2(0x80000000)
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liveins: $r0
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$lr = tMOVr $r0, 14, $noreg
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t2DoLoopStart killed $r0
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bb.2.while.body:
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successors: %bb.2(0x7c000000), %bb.3(0x04000000)
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liveins: $lr
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$r4 = tMOVr $lr, 14, $noreg
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renamable $lr = t2LoopDec killed renamable $lr, 1
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renamable $r0 = t2ADDri renamable $lr, 2, 14, $noreg, $noreg
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$lr = tMOVr $r4, 14, $noreg
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t2LoopEnd renamable $lr, %bb.2, implicit-def dead $cpsr
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tB %bb.3, 14, $noreg
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bb.3.while.end:
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liveins: $r0
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tPOP_RET 14, $noreg, def $r7, def $pc, implicit killed $r0
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bb.4:
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renamable $r0, dead $cpsr = tMOVi8 0, 14, $noreg
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tPOP_RET 14, $noreg, def $r7, def $pc, implicit killed $r0
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...
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