Matt Arsenault 89baeaef2f Reapply "RegAllocFast: Rewrite and improve" ... This reverts commit 73a6a164b8.		2020-09-30 10:35:25 -04:00
..
instruction-select	[MIPS GlobalISel] Select 4 byte unaligned load and store	2020-02-19 11:57:06 +01:00
irtranslator	GlobalISel: Add generic instructions for memory intrinsics	2020-08-26 20:08:45 -04:00
legalizer	[GlobalISel] Fix multiply with overflow intrinsics legalization generating invalid MIR.	2020-09-29 18:40:58 -07:00
llvm-ir	Reapply "RegAllocFast: Rewrite and improve"	2020-09-30 10:35:25 -04:00
mips-prelegalizer-combiner	[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing	2019-09-11 11:16:48 +00:00
regbankselect	[MIPS GlobalISel] Select 4 byte unaligned load and store	2020-02-19 11:57:06 +01:00