forked from OSchip/llvm-project
26 lines
1012 B
LLVM
26 lines
1012 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck -check-prefix=CHECK-P9 %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck -check-prefix=CHECK-P8 %s
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define <4 x i32> @test_signext_vector_inreg(<4 x i16> %n) {
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; CHECK-P9-LABEL: test_signext_vector_inreg:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vspltisw 3, 8
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; CHECK-P9-NEXT: vmrglh 2, 2, 2
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; CHECK-P9-NEXT: vadduwm 3, 3, 3
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; CHECK-P9-NEXT: vslw 2, 2, 3
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; CHECK-P9-NEXT: vsraw 2, 2, 3
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; CHECK-P9-NEXT: blr
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;
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; CHECK-P8-LABEL: test_signext_vector_inreg:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrglh 2, 2, 2
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; CHECK-P8-NEXT: vspltisw 3, 8
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; CHECK-P8-NEXT: vadduwm 3, 3, 3
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; CHECK-P8-NEXT: vslw 2, 2, 3
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; CHECK-P8-NEXT: vsraw 2, 2, 3
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; CHECK-P8-NEXT: blr
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entry:
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%0 = sext <4 x i16> %n to <4 x i32>
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ret <4 x i32> %0
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}
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