Zlatko Buljan 48f1f39bfe Revert r254897 "[mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions" ... Commited patch was intended to implement LH, LHE, LHU and LHUE instructions. After commit test-suite failed with error message in the form of: fatal error: error in backend: Cannot select: t124: i32,ch = load<LD2[%d](tbaa=<0x94acc48>), sext from i16> t0, t2, undef:i32 For that reason I decided to revert commit r254897 and make new patch which besides implementation and standard regression tests will also have dedicated tests (CodeGen) for the above error. llvm-svn: 255109		2015-12-09 13:07:45 +00:00
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AArch64	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
ARM	[ARM] Allow SP in rGPR, starting from ARMv8	2015-10-28 13:58:36 +00:00
Hexagon	[Hexagon] Fixing store instructions and reenabling a few more tests.	2015-11-10 00:22:00 +00:00
Mips	Revert r254897 "[mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions"	2015-12-09 13:07:45 +00:00
PowerPC	[PowerPC] Replace cntlz[.] with cntlzw[.]	2015-10-28 03:26:45 +00:00
Sparc	[Sparc] Implement i64 load/store support for 32-bit sparc.	2015-08-10 19:11:39 +00:00
SystemZ	[SystemZ] Add assembly instructions for obtaining clock values as well as CPU features	2015-10-01 14:43:48 +00:00
X86	[llvm-mc] Ignore opcode size prefix in 64-bit CALL disassembly	2015-08-26 16:20:29 +00:00
XCore	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00