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AArch64
[Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default.
2017-06-06 08:16:19 +00:00
AMDGPU
[AMDGPU] Force qsads instrs to use different dest register than source registers
2017-06-08 18:21:19 +00:00
ARM
[ARM] GlobalISel: Add more tests. NFC
2017-06-08 09:47:30 +00:00
AVR
[AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo Erdi
2017-05-31 06:27:46 +00:00
BPF
[bpf] fix a bug which causes incorrect big endian reloc fixup
2017-05-05 18:05:00 +00:00
Generic
CodeGen/LLVMTargetMachine: Refactor ISel pass construction; NFCI
2017-06-06 00:26:13 +00:00
Hexagon
[Hexagon] Generate 'inbounds' GEPs in HexagonCommonGEP
2017-06-07 20:04:33 +00:00
Inputs
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Lanai
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
MIR
llc: Add ability to parse mir from stdin
2017-06-06 20:06:57 +00:00
MSP430
[MSP430] Fix PR33050: Don't use ADD16ri to lower FrameIndex.
2017-05-24 15:08:30 +00:00
Mips
[mips][dsp] Modify repl.ph to accept signed immediate values
2017-06-07 14:48:46 +00:00
NVPTX
Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."
2017-05-18 18:50:05 +00:00
Nios2
[Nios2] Target registration
2017-05-29 09:48:30 +00:00
PowerPC
[PPC] In PPCBoolRetToInt change the bool value to i64 if the target is ppc64
2017-06-08 18:27:24 +00:00
SPARC
Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."
2017-05-18 18:50:05 +00:00
SystemZ
[SystemZ] Simplify test case. NFC
2017-06-02 23:40:58 +00:00
Thumb
Move machine-cse-physreg.mir to test/CodeGen/Thumb
2017-05-24 17:20:47 +00:00
Thumb2
MIR: remove explicit "noVRegs" property.
2017-05-30 21:28:57 +00:00
WebAssembly
[wasm] Fix test after r304117.
2017-05-29 16:32:52 +00:00
WinEH
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X86
[x86] remove unused param from tests; NFC
2017-06-08 17:02:39 +00:00
XCore
AsmPrinter: mark the beginning and the end of a function in verbose mode
2017-05-23 21:22:16 +00:00