forked from OSchip/llvm-project
91 lines
3.3 KiB
C++
91 lines
3.3 KiB
C++
//=- WebAssemblyMCCodeEmitter.cpp - Convert WebAssembly code to machine code -//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief This file implements the WebAssemblyMCCodeEmitter class.
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///
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCFixup.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "mccodeemitter"
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STATISTIC(MCNumEmitted, "Number of MC instructions emitted.");
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STATISTIC(MCNumFixups, "Number of MC fixups created.");
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namespace {
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class WebAssemblyMCCodeEmitter final : public MCCodeEmitter {
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const MCInstrInfo &MCII;
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// Implementation generated by tablegen.
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uint64_t getBinaryCodeForInstr(const MCInst &MI,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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void encodeInstruction(const MCInst &MI, raw_ostream &OS,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const override;
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public:
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WebAssemblyMCCodeEmitter(const MCInstrInfo &mcii) : MCII(mcii) {}
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};
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} // end anonymous namespace
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MCCodeEmitter *llvm::createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII) {
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return new WebAssemblyMCCodeEmitter(MCII);
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}
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void WebAssemblyMCCodeEmitter::encodeInstruction(
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const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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// FIXME: This is not the real binary encoding. This is an extremely
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// over-simplified encoding where we just use uint64_t for everything. This
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// is a temporary measure.
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support::endian::Writer<support::little>(OS).write<uint64_t>(MI.getOpcode());
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const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
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if (Desc.isVariadic())
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support::endian::Writer<support::little>(OS).write<uint64_t>(
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MI.getNumOperands() - Desc.NumOperands);
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for (unsigned i = 0, e = MI.getNumOperands(); i < e; ++i) {
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const MCOperand &MO = MI.getOperand(i);
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if (MO.isReg()) {
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support::endian::Writer<support::little>(OS).write<uint64_t>(MO.getReg());
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} else if (MO.isImm()) {
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support::endian::Writer<support::little>(OS).write<uint64_t>(MO.getImm());
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} else if (MO.isFPImm()) {
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support::endian::Writer<support::little>(OS).write<double>(MO.getFPImm());
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} else if (MO.isExpr()) {
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support::endian::Writer<support::little>(OS).write<uint64_t>(0);
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Fixups.push_back(MCFixup::create(
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(1 + MCII.get(MI.getOpcode()).isVariadic() + i) * sizeof(uint64_t),
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MO.getExpr(),
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STI.getTargetTriple().isArch64Bit() ? FK_Data_8 : FK_Data_4,
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MI.getLoc()));
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++MCNumFixups;
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} else {
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llvm_unreachable("unexpected operand kind");
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}
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}
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++MCNumEmitted; // Keep track of the # of mi's emitted.
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}
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#include "WebAssemblyGenMCCodeEmitter.inc"
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