.. |
AsmParser
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Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD."
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2016-04-29 17:04:50 +00:00 |
Disassembler
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Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD."
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2016-04-29 17:04:50 +00:00 |
InstPrinter
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Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD."
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2016-04-29 17:04:50 +00:00 |
MCTargetDesc
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[NFC] Header cleanup
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2016-04-18 09:17:29 +00:00 |
TargetInfo
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Remove autoconf support
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2016-01-26 21:29:08 +00:00 |
Utils
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AMDGPU: allow specifying a workgroup size that needs to fit in a compute unit
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2016-04-14 16:27:07 +00:00 |
AMDGPU.h
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AMDGPU: Remove SIFixSGPRLiveRanges pass
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2016-04-14 17:42:29 +00:00 |
AMDGPU.td
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[AMDGPU] Reserve VGPRs for trap handler usage if instructed
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2016-04-26 15:43:14 +00:00 |
AMDGPUAlwaysInlinePass.cpp
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AMDGPU: Minor cleanups to always inline pass
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2015-07-13 19:08:36 +00:00 |
AMDGPUAnnotateKernelFeatures.cpp
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AMDGPU: Implement addrspacecast
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2016-04-25 19:27:24 +00:00 |
AMDGPUAnnotateUniformValues.cpp
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Add optimization bisect opt-in calls for AMDGPU passes
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2016-04-25 22:23:44 +00:00 |
AMDGPUAsmPrinter.cpp
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AMDGPU: Emit error if too much LDS is used
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2016-04-28 19:37:35 +00:00 |
AMDGPUAsmPrinter.h
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[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
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2016-04-26 17:24:40 +00:00 |
AMDGPUCallLowering.cpp
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AMDGPU: Add skeleton GlobalIsel implementation
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2016-04-14 19:09:28 +00:00 |
AMDGPUCallLowering.h
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AMDGPU: Add skeleton GlobalIsel implementation
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2016-04-14 19:09:28 +00:00 |
AMDGPUCallingConv.td
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AMDGPU: Add a shader calling convention
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2016-04-06 19:40:20 +00:00 |
AMDGPUFrameLowering.cpp
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AMDGPU: Fix old comments that mention AMDIL
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2016-01-20 21:22:21 +00:00 |
AMDGPUFrameLowering.h
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AMDGPU: Create emergency stack slots during frame lowering
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2015-11-06 18:17:45 +00:00 |
AMDGPUISelDAGToDAG.cpp
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AMDGPU/SI: Add offset field to ds_permute/ds_bpermute instructions
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2016-04-29 14:34:26 +00:00 |
AMDGPUISelLowering.cpp
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[CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in TargetLoweringBase. This is what the majority of the targets want and removes a bunch of code. Set it to Legal explicitly in the few cases where that's the desired behavior.
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2016-04-28 03:34:31 +00:00 |
AMDGPUISelLowering.h
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AMDGPU: Remove custom load/store scalarization
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2016-04-14 23:31:26 +00:00 |
AMDGPUInstrInfo.cpp
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AMDGPU: Move subtarget specific code out of AMDGPUInstrInfo.cpp
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2016-01-28 16:04:37 +00:00 |
AMDGPUInstrInfo.h
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AMDGPU: Add SIWholeQuadMode pass
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2016-03-21 20:28:33 +00:00 |
AMDGPUInstrInfo.td
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AMDGPU: Implement {BUFFER,FLAT}_ATOMIC_CMPSWAP{,_X2}
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2016-04-01 18:27:37 +00:00 |
AMDGPUInstructions.td
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AMDGPU: Implement canonicalize
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2016-04-14 01:42:16 +00:00 |
AMDGPUIntrinsicInfo.cpp
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[llvm-tblgen] Avoid StringMatcher for GCC and MS builtin names
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2016-01-27 01:43:12 +00:00 |
AMDGPUIntrinsicInfo.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
AMDGPUIntrinsics.td
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AMDGPU: Remove bfi and bfm intrinsics
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2016-02-08 19:06:01 +00:00 |
AMDGPUMCInstLower.cpp
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AMDGPU: Verify instructions in non-debug builds as well
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2016-03-16 09:10:42 +00:00 |
AMDGPUMCInstLower.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
AMDGPUMachineFunction.cpp
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AMDGPU: Add a shader calling convention
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2016-04-06 19:40:20 +00:00 |
AMDGPUMachineFunction.h
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AMDGPU: Add a shader calling convention
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2016-04-06 19:40:20 +00:00 |
AMDGPUOpenCLImageTypeLoweringPass.cpp
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[NFC] Header cleanup
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2016-04-18 09:17:29 +00:00 |
AMDGPUPromoteAlloca.cpp
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AMDGPU: Fix mishandling array allocations when promoting alloca
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2016-04-28 18:38:48 +00:00 |
AMDGPURegisterInfo.cpp
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…
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AMDGPURegisterInfo.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
AMDGPURegisterInfo.td
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AMDGPU: Set SubRegIndex size and offset
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2015-07-30 17:03:11 +00:00 |
AMDGPUSubtarget.cpp
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[AMDGPU] Reserve VGPRs for trap handler usage if instructed
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2016-04-26 15:43:14 +00:00 |
AMDGPUSubtarget.h
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[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
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2016-04-26 17:24:40 +00:00 |
AMDGPUTargetMachine.cpp
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AMDGPU/SI: Enable the post-ra scheduler
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2016-04-30 00:23:06 +00:00 |
AMDGPUTargetMachine.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
AMDGPUTargetObjectFile.cpp
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AMDGPU/SI: Emit constant variables in the .hsatext section when targeting HSA
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2015-12-15 22:39:36 +00:00 |
AMDGPUTargetObjectFile.h
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AMDGPU/SI: Emit constant arrays in the .text section
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2015-12-10 02:13:01 +00:00 |
AMDGPUTargetTransformInfo.cpp
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AMDGPU/SI: add llvm.amdgcn.ps.live intrinsic
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2016-04-22 04:04:08 +00:00 |
AMDGPUTargetTransformInfo.h
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AMDGPU: Partially implement getArithmeticInstrCost for FP ops
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2016-03-25 01:00:32 +00:00 |
AMDILCFGStructurizer.cpp
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Bug 20810: Use report_fatal_error instead of unreachable
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2016-03-02 03:33:55 +00:00 |
AMDKernelCodeT.h
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[AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields)
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2016-02-24 10:54:25 +00:00 |
CIInstructions.td
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AMDGPU: Implement i64 global atomics
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2016-04-12 14:05:11 +00:00 |
CMakeLists.txt
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AMDGPU/SI: Enable the post-ra scheduler
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2016-04-30 00:23:06 +00:00 |
CaymanInstructions.td
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AMDGPU: Remove 24-bit intrinsics
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2016-01-29 10:05:16 +00:00 |
EvergreenInstructions.td
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AMDGPU: Remove 24-bit intrinsics
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2016-01-29 10:05:16 +00:00 |
GCNHazardRecognizer.cpp
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AMDGPU/SI: Enable the post-ra scheduler
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2016-04-30 00:23:06 +00:00 |
GCNHazardRecognizer.h
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AMDGPU/SI: Enable the post-ra scheduler
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2016-04-30 00:23:06 +00:00 |
LLVMBuild.txt
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[AMDGPU] Disassembler: Added basic disassembler for AMDGPU target
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2016-02-18 03:42:32 +00:00 |
Processors.td
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AMDGPU/SI: Add Polaris support
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2016-03-24 15:31:05 +00:00 |
R600ClauseMergePass.cpp
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Add optimization bisect opt-in calls for AMDGPU passes
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2016-04-25 22:23:44 +00:00 |
R600ControlFlowFinalizer.cpp
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AMDGPU: Add a shader calling convention
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2016-04-06 19:40:20 +00:00 |
R600Defines.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
R600EmitClauseMarkers.cpp
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…
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R600ExpandSpecialInstrs.cpp
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…
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R600ISelLowering.cpp
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[CodeGen] Add getBuildVector and getSplatBuildVector helpers. NFCI.
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2016-04-26 21:15:30 +00:00 |
R600ISelLowering.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
R600InstrFormats.td
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…
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R600InstrInfo.cpp
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AMDGPU: Add a shader calling convention
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2016-04-06 19:40:20 +00:00 |
R600InstrInfo.h
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[NFC] Header cleanup
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2016-04-18 09:17:29 +00:00 |
R600Instructions.td
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AMDGPU: Rename intrinsic to better match instruction name
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2016-02-13 01:03:00 +00:00 |
R600Intrinsics.td
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AMDGPU: Move AMDGPU intrinsics only used by R600
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2016-01-26 04:49:24 +00:00 |
R600MachineFunctionInfo.cpp
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…
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R600MachineFunctionInfo.h
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[NFC] Header cleanup
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2016-04-18 09:17:29 +00:00 |
R600MachineScheduler.cpp
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…
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R600MachineScheduler.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
R600OptimizeVectorRegisters.cpp
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Add optimization bisect opt-in calls for AMDGPU passes
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2016-04-25 22:23:44 +00:00 |
R600Packetizer.cpp
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AMDGPU: Simplify boolean conditional return statements
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2016-03-02 23:00:21 +00:00 |
R600RegisterInfo.cpp
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…
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R600RegisterInfo.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
R600RegisterInfo.td
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…
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R600Schedule.td
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…
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R600TextureIntrinsicsReplacer.cpp
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AMDGPU: Rename some r600 intrinsics to use correct TargetPrefix
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2016-01-22 19:00:09 +00:00 |
R700Instructions.td
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…
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SIAnnotateControlFlow.cpp
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[StructurizeCFG] Annotate branches that were treated as uniform
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2016-04-14 17:42:35 +00:00 |
SIDefines.h
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[AMDGPU] Assembler: basic support for SDWA instructions
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2016-04-26 13:33:56 +00:00 |
SIFixControlFlowLiveIntervals.cpp
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AMDGPU: Remove unused includes
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2015-09-25 00:28:43 +00:00 |
SIFixSGPRCopies.cpp
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AMDGPU: Fix debug name of pass to better match
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2016-04-21 18:21:54 +00:00 |
SIFoldOperands.cpp
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Add optimization bisect opt-in calls for AMDGPU passes
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2016-04-25 22:23:44 +00:00 |
SIFrameLowering.cpp
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AMDGPU/SI: Don't try to move scratch wave offset when there are no free SGPRs
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2016-03-03 03:45:09 +00:00 |
SIFrameLowering.h
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AMDGPU: Remove SIPrepareScratchRegs
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2015-11-30 21:15:53 +00:00 |
SIISelLowering.cpp
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AMDGPU: Add kernarg.segment.ptr intrinsic
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2016-04-29 21:16:52 +00:00 |
SIISelLowering.h
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AMDGPU: Implement addrspacecast
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2016-04-25 19:27:24 +00:00 |
SIInsertNopsPass.cpp
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[AMDGPU] Insert nop pass: take care of outstanding feedback
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2016-04-22 17:04:51 +00:00 |
SIInsertWaits.cpp
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AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits
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2016-04-30 04:04:48 +00:00 |
SIInstrFormats.td
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[AMDGPU] Assembler: basic support for SDWA instructions
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2016-04-26 13:33:56 +00:00 |
SIInstrInfo.cpp
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AMDGPU/SI: Enable the post-ra scheduler
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2016-04-30 00:23:06 +00:00 |
SIInstrInfo.h
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Add missing override.
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2016-04-30 15:18:21 +00:00 |
SIInstrInfo.td
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AMDGPU/SI: Add offset field to ds_permute/ds_bpermute instructions
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2016-04-29 14:34:26 +00:00 |
SIInstructions.td
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Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD."
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2016-04-29 17:04:50 +00:00 |
SIIntrinsics.td
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Split IntrReadArgMem into IntrReadMem and IntrArgMemOnly
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2016-04-21 17:48:02 +00:00 |
SILoadStoreOptimizer.cpp
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Add optimization bisect opt-in calls for AMDGPU passes
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2016-04-25 22:23:44 +00:00 |
SILowerControlFlow.cpp
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AMDGPU: Fix crash with unreachable terminators.
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2016-04-29 21:52:13 +00:00 |
SILowerI1Copies.cpp
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AMDGPU: Fix passes depending on dominator tree for no reason
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2016-02-11 06:15:34 +00:00 |
SIMachineFunctionInfo.cpp
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[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
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2016-04-26 17:24:40 +00:00 |
SIMachineFunctionInfo.h
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[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
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2016-04-26 17:24:40 +00:00 |
SIMachineScheduler.cpp
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Fix a couple assertions that can never fire because they just contained the text string which always evaluates to true. Add a ! so they'll evaluate to false.
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2016-04-24 02:01:25 +00:00 |
SIMachineScheduler.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
SIRegisterInfo.cpp
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AMDGPU/SI: Enable the post-ra scheduler
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2016-04-30 00:23:06 +00:00 |
SIRegisterInfo.h
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AMDGPU/SI: Enable the post-ra scheduler
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2016-04-30 00:23:06 +00:00 |
SIRegisterInfo.td
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Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD."
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2016-04-29 17:04:50 +00:00 |
SISchedule.td
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AMDGPU/SI: Enable the post-ra scheduler
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2016-04-30 00:23:06 +00:00 |
SIShrinkInstructions.cpp
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Add optimization bisect opt-in calls for AMDGPU passes
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2016-04-25 22:23:44 +00:00 |
SITypeRewriter.cpp
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AMDGPU: Add a shader calling convention
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2016-04-06 19:40:20 +00:00 |
SIWholeQuadMode.cpp
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AMDGPU/SI: add llvm.amdgcn.ps.live intrinsic
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2016-04-22 04:04:08 +00:00 |
VIInstrFormats.td
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[AMDGPU] Assembler: basic support for SDWA instructions
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2016-04-26 13:33:56 +00:00 |
VIInstructions.td
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[AMDGPU] Assembler: change v_madmk operands to have same order as mad.
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2016-03-11 09:27:25 +00:00 |