forked from OSchip/llvm-project
211 lines
7.1 KiB
C++
211 lines
7.1 KiB
C++
//===--- Hexagon.cpp - Implement Hexagon target feature support -----------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements Hexagon TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#include "Hexagon.h"
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#include "Targets.h"
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#include "clang/Basic/MacroBuilder.h"
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#include "clang/Basic/TargetBuiltins.h"
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#include "llvm/ADT/StringSwitch.h"
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using namespace clang;
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using namespace clang::targets;
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void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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Builder.defineMacro("__qdsp6__", "1");
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Builder.defineMacro("__hexagon__", "1");
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Builder.defineMacro("__ELF__");
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// The macro __HVXDBL__ is deprecated.
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bool DefineHvxDbl = false;
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if (CPU == "hexagonv5") {
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Builder.defineMacro("__HEXAGON_V5__");
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Builder.defineMacro("__HEXAGON_ARCH__", "5");
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if (Opts.HexagonQdsp6Compat) {
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Builder.defineMacro("__QDSP6_V5__");
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Builder.defineMacro("__QDSP6_ARCH__", "5");
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}
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} else if (CPU == "hexagonv55") {
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Builder.defineMacro("__HEXAGON_V55__");
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Builder.defineMacro("__HEXAGON_ARCH__", "55");
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Builder.defineMacro("__QDSP6_V55__");
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Builder.defineMacro("__QDSP6_ARCH__", "55");
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} else if (CPU == "hexagonv60") {
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DefineHvxDbl = true;
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Builder.defineMacro("__HEXAGON_V60__");
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Builder.defineMacro("__HEXAGON_ARCH__", "60");
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Builder.defineMacro("__QDSP6_V60__");
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Builder.defineMacro("__QDSP6_ARCH__", "60");
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} else if (CPU == "hexagonv62") {
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DefineHvxDbl = true;
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Builder.defineMacro("__HEXAGON_V62__");
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Builder.defineMacro("__HEXAGON_ARCH__", "62");
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} else if (CPU == "hexagonv65") {
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DefineHvxDbl = true;
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Builder.defineMacro("__HEXAGON_V65__");
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Builder.defineMacro("__HEXAGON_ARCH__", "65");
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} else if (CPU == "hexagonv66") {
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DefineHvxDbl = true;
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Builder.defineMacro("__HEXAGON_V66__");
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Builder.defineMacro("__HEXAGON_ARCH__", "66");
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} else if (CPU == "hexagonv67") {
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Builder.defineMacro("__HEXAGON_V67__");
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Builder.defineMacro("__HEXAGON_ARCH__", "67");
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} else if (CPU == "hexagonv67t") {
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Builder.defineMacro("__HEXAGON_V67T__");
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Builder.defineMacro("__HEXAGON_ARCH__", "67");
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}
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if (hasFeature("hvx-length64b")) {
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Builder.defineMacro("__HVX__");
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Builder.defineMacro("__HVX_ARCH__", HVXVersion);
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Builder.defineMacro("__HVX_LENGTH__", "64");
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}
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if (hasFeature("hvx-length128b")) {
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Builder.defineMacro("__HVX__");
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Builder.defineMacro("__HVX_ARCH__", HVXVersion);
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Builder.defineMacro("__HVX_LENGTH__", "128");
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if (DefineHvxDbl)
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Builder.defineMacro("__HVXDBL__");
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}
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if (hasFeature("audio")) {
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Builder.defineMacro("__HEXAGON_AUDIO__");
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}
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std::string NumPhySlots = isTinyCore() ? "3" : "4";
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Builder.defineMacro("__HEXAGON_PHYSICAL_SLOTS__", NumPhySlots);
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}
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bool HexagonTargetInfo::initFeatureMap(
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llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
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const std::vector<std::string> &FeaturesVec) const {
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if (isTinyCore())
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Features["audio"] = true;
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StringRef CPUFeature = CPU;
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CPUFeature.consume_front("hexagon");
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CPUFeature.consume_back("t");
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if (!CPUFeature.empty())
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Features[CPUFeature] = true;
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Features["long-calls"] = false;
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return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
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}
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bool HexagonTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
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DiagnosticsEngine &Diags) {
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for (auto &F : Features) {
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if (F == "+hvx-length64b")
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HasHVX = HasHVX64B = true;
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else if (F == "+hvx-length128b")
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HasHVX = HasHVX128B = true;
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else if (F.find("+hvxv") != std::string::npos) {
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HasHVX = true;
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HVXVersion = F.substr(std::string("+hvxv").length());
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} else if (F == "-hvx")
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HasHVX = HasHVX64B = HasHVX128B = false;
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else if (F == "+long-calls")
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UseLongCalls = true;
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else if (F == "-long-calls")
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UseLongCalls = false;
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else if (F == "+audio")
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HasAudio = true;
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}
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return true;
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}
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const char *const HexagonTargetInfo::GCCRegNames[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8",
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"r9", "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17",
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"r18", "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26",
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"r27", "r28", "r29", "r30", "r31", "p0", "p1", "p2", "p3",
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"sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp",
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"r1:0", "r3:2", "r5:4", "r7:6", "r9:8", "r11:10", "r13:12", "r15:14",
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"r17:16", "r19:18", "r21:20", "r23:22", "r25:24", "r27:26", "r29:28",
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"r31:30"
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};
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ArrayRef<const char *> HexagonTargetInfo::getGCCRegNames() const {
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return llvm::makeArrayRef(GCCRegNames);
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}
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const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
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{{"sp"}, "r29"},
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{{"fp"}, "r30"},
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{{"lr"}, "r31"},
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};
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ArrayRef<TargetInfo::GCCRegAlias> HexagonTargetInfo::getGCCRegAliases() const {
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return llvm::makeArrayRef(GCCRegAliases);
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}
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const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
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#define BUILTIN(ID, TYPE, ATTRS) \
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{#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
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#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
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{#ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr},
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#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
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{#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
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#include "clang/Basic/BuiltinsHexagon.def"
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};
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bool HexagonTargetInfo::hasFeature(StringRef Feature) const {
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std::string VS = "hvxv" + HVXVersion;
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if (Feature == VS)
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return true;
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return llvm::StringSwitch<bool>(Feature)
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.Case("hexagon", true)
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.Case("hvx", HasHVX)
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.Case("hvx-length64b", HasHVX64B)
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.Case("hvx-length128b", HasHVX128B)
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.Case("long-calls", UseLongCalls)
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.Case("audio", HasAudio)
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.Default(false);
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}
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struct CPUSuffix {
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llvm::StringLiteral Name;
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llvm::StringLiteral Suffix;
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};
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static constexpr CPUSuffix Suffixes[] = {
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{{"hexagonv5"}, {"5"}}, {{"hexagonv55"}, {"55"}},
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{{"hexagonv60"}, {"60"}}, {{"hexagonv62"}, {"62"}},
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{{"hexagonv65"}, {"65"}}, {{"hexagonv66"}, {"66"}},
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{{"hexagonv67"}, {"67"}}, {{"hexagonv67t"}, {"67t"}},
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};
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const char *HexagonTargetInfo::getHexagonCPUSuffix(StringRef Name) {
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const CPUSuffix *Item = llvm::find_if(
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Suffixes, [Name](const CPUSuffix &S) { return S.Name == Name; });
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if (Item == std::end(Suffixes))
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return nullptr;
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return Item->Suffix.data();
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}
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void HexagonTargetInfo::fillValidCPUList(
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SmallVectorImpl<StringRef> &Values) const {
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for (const CPUSuffix &Suffix : Suffixes)
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Values.push_back(Suffix.Name);
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}
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ArrayRef<Builtin::Info> HexagonTargetInfo::getTargetBuiltins() const {
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return llvm::makeArrayRef(BuiltinInfo, clang::Hexagon::LastTSBuiltin -
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Builtin::FirstTSBuiltin);
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}
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