forked from OSchip/llvm-project
83 lines
1.6 KiB
LLVM
83 lines
1.6 KiB
LLVM
; RUN: llc -march=mipsel -O0 < %s | FileCheck %s -check-prefix=None
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; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=Default
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define void @foo1() nounwind {
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entry:
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; Default: jalr
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; Default-NOT: nop
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; Default: jr
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; Default-NOT: nop
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; Default: .end
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; None: jalr
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; None: nop
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; None: jr
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; None: nop
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; None: .end
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tail call void @foo2(i32 3) nounwind
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ret void
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}
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declare void @foo2(i32)
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; Check that cvt.d.w goes into jalr's delay slot.
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;
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define void @foo3(i32 %a) nounwind {
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entry:
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; Default: foo3:
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; Default: jalr
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; Default: cvt.d.w
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%conv = sitofp i32 %a to double
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tail call void @foo4(double %conv) nounwind
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ret void
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}
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declare void @foo4(double)
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@g2 = external global i32
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@g1 = external global i32
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@g3 = external global i32
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; Check that branch delay slot can be filled with an instruction with operand
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; $1.
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;
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; Default: foo5:
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; Default-NOT: nop
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define void @foo5(i32 %a) nounwind {
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entry:
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%0 = load i32* @g2, align 4
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%tobool = icmp eq i32 %a, 0
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br i1 %tobool, label %if.else, label %if.then
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if.then:
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%1 = load i32* @g1, align 4
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%add = add nsw i32 %1, %0
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store i32 %add, i32* @g1, align 4
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br label %if.end
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if.else:
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%2 = load i32* @g3, align 4
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%sub = sub nsw i32 %2, %0
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store i32 %sub, i32* @g3, align 4
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br label %if.end
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if.end:
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ret void
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}
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; Check that delay slot filler can place mov.s or mov.d in delay slot.
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;
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; Default: foo6:
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; Default-NOT: nop
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define void @foo6(float %a0, double %a1) nounwind {
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entry:
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tail call void @foo7(double %a1, float %a0) nounwind
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ret void
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}
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declare void @foo7(double, float)
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