forked from OSchip/llvm-project
c045c557b0
- Relex hard coded registers and stack frame sizes - Some test cleanups - Change phi-dbg.ll to match on mir output after phi elimination instead of going through the whole codegen pipeline. This is in preparation for https://reviews.llvm.org/D52010 I'm committing all the test changes upfront that work before and after independently. llvm-svn: 345532 |
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br1.ll | ||
bricmpi1.ll | ||
bswap1.ll | ||
callabi.ll | ||
check-disabled-mcpus.ll | ||
constexpr-address.ll | ||
div1.ll | ||
double-arg.ll | ||
fast-isel-softfloat-lower-args.ll | ||
fastalloca.ll | ||
fastcc-miss.ll | ||
fpcmpa.ll | ||
fpext.ll | ||
fpintconv.ll | ||
fptrunc.ll | ||
icmpa.ll | ||
icmpbr1.ll | ||
icmpi1.ll | ||
loadstore2.ll | ||
loadstoreconv.ll | ||
loadstrconst.ll | ||
logopm.ll | ||
memtest1.ll | ||
mul1.ll | ||
nullvoid.ll | ||
overflt.ll | ||
rem1.ll | ||
retabi.ll | ||
sel1.ll | ||
shftopm.ll | ||
shift.ll | ||
simplestore.ll | ||
simplestorefp1.ll | ||
simplestorei.ll | ||
stackloadstore.ll |