llvm-project/llvm/test/CodeGen/Mips/Fast-ISel
Matthias Braun c045c557b0 Relax fast register allocator related test cases; NFC
- Relex hard coded registers and stack frame sizes
- Some test cleanups
- Change phi-dbg.ll to match on mir output after phi elimination instead
  of going through the whole codegen pipeline.

This is in preparation for https://reviews.llvm.org/D52010
I'm committing all the test changes upfront that work before and after
independently.

llvm-svn: 345532
2018-10-29 20:10:42 +00:00
..
br1.ll
bricmpi1.ll Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
bswap1.ll
callabi.ll Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
check-disabled-mcpus.ll
constexpr-address.ll
div1.ll
double-arg.ll
fast-isel-softfloat-lower-args.ll
fastalloca.ll Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
fastcc-miss.ll
fpcmpa.ll
fpext.ll
fpintconv.ll
fptrunc.ll
icmpa.ll
icmpbr1.ll [Mips][FastISel] Do not duplicate condition while lowering branches 2018-07-02 08:56:57 +00:00
icmpi1.ll [Mips][FastISel] Fix handling of icmp with i1 type 2018-07-17 14:57:46 +00:00
loadstore2.ll
loadstoreconv.ll
loadstrconst.ll
logopm.ll Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
memtest1.ll
mul1.ll
nullvoid.ll
overflt.ll
rem1.ll
retabi.ll
sel1.ll [Mips][FastISel] Fix handling of icmp with i1 type 2018-07-17 14:57:46 +00:00
shftopm.ll
shift.ll
simplestore.ll [FastISel] Disable local value sinking by default 2018-04-11 16:03:07 +00:00
simplestorefp1.ll
simplestorei.ll [FastISel] Disable local value sinking by default 2018-04-11 16:03:07 +00:00
stackloadstore.ll