| .. |
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AsmParser
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MC: Remove unused entities.
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2016-10-09 04:39:13 +00:00 |
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Disassembler
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[AMDGPU] Disassembler: print label names in branch instructions
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2016-10-06 13:46:08 +00:00 |
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InstPrinter
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[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
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2016-10-07 14:46:06 +00:00 |
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MCTargetDesc
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AMDGPU/SI: Add support for 8-byte relocations
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2016-10-07 20:36:58 +00:00 |
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TargetInfo
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Remove autoconf support
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2016-01-26 21:29:08 +00:00 |
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Utils
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[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
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2016-10-07 14:46:06 +00:00 |
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AMDGPU.h
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[AMDGPU] Pass optimization level to SelectionDAGISel
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2016-10-03 18:47:26 +00:00 |
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AMDGPU.td
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[AMDGPU] Enable changing instprinter's behavior based on the per-function
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2016-09-27 14:42:48 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUAsmPrinter.cpp
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
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AMDGPUAsmPrinter.h
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
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AMDGPUCallLowering.cpp
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GlobalISel: pass Function to lowerFormalArguments directly (NFC).
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2016-09-21 12:57:35 +00:00 |
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AMDGPUCallLowering.h
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GlobalISel: pass Function to lowerFormalArguments directly (NFC).
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2016-09-21 12:57:35 +00:00 |
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AMDGPUCallingConv.td
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AMDGPU: Fix kernel argument alignment impacting stack size
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2016-06-18 05:15:53 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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[AMDGPU] AMDGPUCodeGenPrepare: remove extra ';'
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2016-10-07 14:39:53 +00:00 |
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AMDGPUFrameLowering.cpp
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MachineFunction: Return reference for getFrameInfo(); NFC
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2016-07-28 18:40:00 +00:00 |
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AMDGPUFrameLowering.h
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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[AMDGPU] Pass optimization level to SelectionDAGISel
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2016-10-03 18:47:26 +00:00 |
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AMDGPUISelLowering.cpp
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Target: Remove unused entities.
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2016-10-09 04:38:57 +00:00 |
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AMDGPUISelLowering.h
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AMDGPU: Refactor kernel argument lowering
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2016-09-16 21:53:00 +00:00 |
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AMDGPUInstrInfo.cpp
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[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
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2016-10-07 14:46:06 +00:00 |
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AMDGPUInstrInfo.h
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[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
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2016-10-07 14:46:06 +00:00 |
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AMDGPUInstrInfo.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
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AMDGPUInstructions.td
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Target: Remove unused patterns and transforms. NFC.
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2016-10-07 00:30:49 +00:00 |
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AMDGPUIntrinsicInfo.cpp
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AMDGPU: Change fdiv lowering based on !fpmath metadata
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2016-07-19 23:16:53 +00:00 |
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AMDGPUIntrinsicInfo.h
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AMDGPU: Change fdiv lowering based on !fpmath metadata
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2016-07-19 23:16:53 +00:00 |
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AMDGPUIntrinsics.td
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AMDGPU: Remove read_workdim intrinsic
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2016-07-25 20:17:02 +00:00 |
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AMDGPUMCInstLower.cpp
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
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AMDGPUMCInstLower.h
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
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AMDGPUMachineFunction.cpp
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AMDGPU: Make AMDGPUMachineFunction fields private
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2016-07-26 16:45:58 +00:00 |
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AMDGPUMachineFunction.h
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AMDGPU: Make AMDGPUMachineFunction fields private
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2016-07-26 16:45:58 +00:00 |
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUPromoteAlloca.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPURegisterInfo.cpp
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
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AMDGPURegisterInfo.h
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
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AMDGPURegisterInfo.td
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…
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AMDGPURuntimeMetadata.h
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AMDGPU: Add hidden kernel arguments to runtime metadata
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2016-09-07 17:44:00 +00:00 |
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AMDGPUSubtarget.cpp
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AMDGPU/SI: Include implicit arguments in kernarg_segment_byte_size
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2016-09-23 01:33:26 +00:00 |
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AMDGPUSubtarget.h
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[AMDGPU] Ask subtarget if waitcnt instruction is needed before barrier instruction
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2016-09-30 16:50:36 +00:00 |
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AMDGPUTargetMachine.cpp
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BranchRelaxation: Support expanding unconditional branches
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2016-10-06 16:20:41 +00:00 |
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AMDGPUTargetMachine.h
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
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AMDGPUTargetObjectFile.cpp
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Move the Mangler from the AsmPrinter down to TLOF and clean up the
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2016-09-16 07:33:15 +00:00 |
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AMDGPUTargetObjectFile.h
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Move the Mangler from the AsmPrinter down to TLOF and clean up the
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2016-09-16 07:33:15 +00:00 |
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AMDGPUTargetTransformInfo.cpp
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Add new target hooks for LoadStoreVectorizer
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2016-10-03 10:31:34 +00:00 |
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AMDGPUTargetTransformInfo.h
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Add new target hooks for LoadStoreVectorizer
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2016-10-03 10:31:34 +00:00 |
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AMDILCFGStructurizer.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDKernelCodeT.h
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[AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields)
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2016-02-24 10:54:25 +00:00 |
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BUFInstructions.td
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[AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3.
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2016-10-07 15:53:16 +00:00 |
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CIInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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CMakeLists.txt
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
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CaymanInstructions.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
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DSInstructions.td
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AMDGPU: Partially fix reported code size for some instructions
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2016-10-06 10:13:23 +00:00 |
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EvergreenInstructions.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
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FLATInstructions.td
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[AMDGPU] Refactor FLAT TD instructions
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2016-09-05 11:22:51 +00:00 |
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GCNHazardRecognizer.cpp
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AMDGPU/SI: Handle div_fmas hazard in GCNHazardRecognizer
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2016-10-07 23:42:48 +00:00 |
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GCNHazardRecognizer.h
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AMDGPU/SI: Handle div_fmas hazard in GCNHazardRecognizer
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2016-10-07 23:42:48 +00:00 |
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GCNSchedStrategy.cpp
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[AMDGPU] Wave and register controls
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2016-09-06 20:22:28 +00:00 |
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GCNSchedStrategy.h
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AMDGPU/SI: Implement a custom MachineSchedStrategy
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2016-08-29 19:42:52 +00:00 |
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LLVMBuild.txt
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AMDGPU: Prune AMDGPUAsmParser in libdeps.
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2016-07-09 07:54:27 +00:00 |
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MIMGInstructions.td
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AMDGPU/SI: MIMG TD Refactoring.
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2016-09-01 17:54:54 +00:00 |
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Processors.td
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AMDGPU : Add XNACK feature to GPUs that support it.
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2016-09-06 19:55:17 +00:00 |
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R600ClauseMergePass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600ControlFlowFinalizer.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600Defines.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
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R600EmitClauseMarkers.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600ExpandSpecialInstrs.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600FrameLowering.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600FrameLowering.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600ISelLowering.cpp
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AMDGPU: Refactor kernel argument lowering
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2016-09-16 21:53:00 +00:00 |
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R600ISelLowering.h
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AMDGPU: Fix i1 fp_to_int
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2016-07-22 17:01:21 +00:00 |
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R600InstrFormats.td
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AMDGPU/R600: Convert buffer id to VTX_READ input
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2016-08-15 21:38:30 +00:00 |
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R600InstrInfo.cpp
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
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R600InstrInfo.h
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
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R600Instructions.td
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Target: Remove unused patterns and transforms. NFC.
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2016-10-07 00:30:49 +00:00 |
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R600Intrinsics.td
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AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
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2016-07-15 21:27:08 +00:00 |
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R600MachineFunctionInfo.cpp
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
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R600MachineFunctionInfo.h
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
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R600MachineScheduler.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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R600MachineScheduler.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600OptimizeVectorRegisters.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600Packetizer.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600RegisterInfo.cpp
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
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R600RegisterInfo.h
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
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R600RegisterInfo.td
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…
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R600Schedule.td
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AMDGPU: Fix trailing whitespace
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2016-06-10 02:18:02 +00:00 |
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R700Instructions.td
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…
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SIAnnotateControlFlow.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIDebuggerInsertNops.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIDefines.h
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[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
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2016-10-07 14:46:06 +00:00 |
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SIFixControlFlowLiveIntervals.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIFixSGPRCopies.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIFoldOperands.cpp
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AMDGPU: Don't fold undef uses or copies with implicit uses
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2016-10-06 18:12:13 +00:00 |
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SIFrameLowering.cpp
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AMDGPU/SI: Add support for triples with the mesa3d operating system
|
2016-09-16 21:34:26 +00:00 |
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SIFrameLowering.h
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AMDGPU: Refactor frame lowering
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2016-08-31 21:52:21 +00:00 |
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SIISelLowering.cpp
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AMDGPU: Refactor indirect vector lowering
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2016-10-04 01:41:05 +00:00 |
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SIISelLowering.h
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AMDGPU: Fix broken FrameIndex handling
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2016-09-17 16:09:55 +00:00 |
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SIInsertSkips.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIInsertWaits.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIInstrFormats.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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SIInstrInfo.cpp
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BranchRelaxation: Support expanding unconditional branches
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2016-10-06 16:20:41 +00:00 |
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SIInstrInfo.h
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BranchRelaxation: Support expanding unconditional branches
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2016-10-06 16:20:41 +00:00 |
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SIInstrInfo.td
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[AMDGPU] Disassembler: print label names in branch instructions
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2016-10-06 13:46:08 +00:00 |
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SIInstructions.td
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AMDGPU: Remove scheduling info from si_mask_branch
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2016-10-06 18:12:07 +00:00 |
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SIIntrinsics.td
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AMDGPU: Allow some control flow intrinsics to be CSEd
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2016-09-16 22:11:18 +00:00 |
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SILoadStoreOptimizer.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SILowerControlFlow.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
|
SILowerI1Copies.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
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SIMachineFunctionInfo.cpp
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AMDGPU/SI: Add support for triples with the mesa3d operating system
|
2016-09-16 21:34:26 +00:00 |
|
SIMachineFunctionInfo.h
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[AMDGPU] Wave and register controls
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2016-09-06 20:22:28 +00:00 |
|
SIMachineScheduler.cpp
|
AMDGPU/SI: Use a better method for determining the largest pressure sets
|
2016-08-26 21:16:37 +00:00 |
|
SIMachineScheduler.h
|
AMDGPU: R600 code splitting cleanup
|
2016-03-11 08:00:27 +00:00 |
|
SIOptimizeExecMasking.cpp
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AMDGPU: Fix use-after-free in SIOptimizeExecMasking
|
2016-10-07 08:40:14 +00:00 |
|
SIRegisterInfo.cpp
|
AMDGPU: Do not re-use tmpreg in spill/restore lowering
|
2016-10-05 20:02:51 +00:00 |
|
SIRegisterInfo.h
|
AMDGPU: Factor SGPR spilling into separate functions
|
2016-10-04 01:14:56 +00:00 |
|
SIRegisterInfo.td
|
AMDGPU : Fix mqsad_u32_u8 instruction incorrect data type.
|
2016-09-09 19:31:51 +00:00 |
|
SISchedule.td
|
AMDGPU/SI: Implement a custom MachineSchedStrategy
|
2016-08-29 19:42:52 +00:00 |
|
SIShrinkInstructions.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SITypeRewriter.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SIWholeQuadMode.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SMInstructions.td
|
[AMDGPU] Scalar Memory instructions TD refactoring
|
2016-09-01 09:56:47 +00:00 |
|
SOPInstructions.td
|
BranchRelaxation: Support expanding unconditional branches
|
2016-10-06 16:20:41 +00:00 |
|
VIInstrFormats.td
|
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
|
VIInstructions.td
|
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
|
VOP1Instructions.td
|
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
|
VOP2Instructions.td
|
[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
|
2016-10-07 14:46:06 +00:00 |
|
VOP3Instructions.td
|
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
|
VOPCInstructions.td
|
AMDGPU: Use unsigned compare for eq/ne
|
2016-09-30 01:50:20 +00:00 |
|
VOPInstructions.td
|
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
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