llvm-project/mlir/test/Conversion
Alex Zinenko a776942ba1 [mlir] squash LLVM_AVX512 dialect into AVX512
The dialect separation was introduced to demarkate ops operating in different
type systems. This is no longer the case after the LLVM dialect has migrated to
using built-in vector types, so the original reason for separation is no longer
valid. Squash the two dialects into one.

The code size decrease isn't quite large: the ops originally in LLVM_AVX512 are
preserved because they match LLVM IR intrinsics specialized for vector element
bitwidth. However, it is still conceptually beneficial to have only one
dialect. I originally considered to use Tablegen multiclasses to define both
the type-polymorphic op and its two intrinsic-related instantiations, but
decided against it given both the complexity of the required Tablegen input and
its dissimilarity with the rest of ODS-defined ops, both potentially resulting
in very poor maintainability.

Depends On D98327

Reviewed By: nicolasvasilache, springerm

Differential Revision: https://reviews.llvm.org/D98328
2021-03-10 13:07:26 +01:00
..
AffineToStandard Revert "[MLIR] Create memref dialect and move several dialect-specific ops from std." 2021-02-18 12:49:52 +01:00
ArmSVEToLLVM [mlir] make vector to llvm conversion truly partial 2021-02-04 11:33:24 +01:00
AsyncToLLVM Revert "[MLIR] Create memref dialect and move several dialect-specific ops from std." 2021-02-18 12:49:52 +01:00
ComplexToLLVM [mlir] turn complex-to-llvm into a partial conversion 2021-01-28 19:14:01 +01:00
GPUCommon Pass GPU events instead of streams across async regions. 2021-02-25 13:18:18 +01:00
GPUToCUDA [mlir] replace LLVM dialect float types with built-ins 2021-01-08 17:38:12 +01:00
GPUToNVVM Lower math.expm1 to intrinsics in the GPUToNVVM and GPUToROCDL conversions. 2021-02-16 10:23:42 +01:00
GPUToROCDL Lower math.expm1 to intrinsics in the GPUToNVVM and GPUToROCDL conversions. 2021-02-16 10:23:42 +01:00
GPUToROCm [mlir] replace LLVM dialect float types with built-ins 2021-01-08 17:38:12 +01:00
GPUToSPIRV [MLIR][SPIRV] Rename `spv.globalVariable` to `spv.GlobalVariable`. 2021-03-04 16:24:59 -05:00
GPUToVulkan [MLIR][SPIRV] Rename `spv.globalVariable` to `spv.GlobalVariable`. 2021-03-04 16:24:59 -05:00
LinalgToSPIRV [MLIR][SPIRV] Rename `spv.selection` to `spv.mlir.selection`. 2021-03-06 16:05:31 +01:00
LinalgToVector Revert "[MLIR] Create memref dialect and move several dialect-specific ops from std." 2021-02-18 12:49:52 +01:00
OpenMPToLLVM [mlir][OpFormatGen] Format enum attribute cases as keywords when possible 2021-01-14 11:35:49 -08:00
PDLToPDLInterp [mlir][pdl][NFC] Rename InputOp to OperandOp 2021-03-03 15:48:00 -08:00
SCFToGPU Revert "[MLIR] Create memref dialect and move several dialect-specific ops from std." 2021-02-18 12:49:52 +01:00
SCFToOpenMP [mlir] Add conversion from SCF parallel loops to OpenMP 2020-11-24 21:12:56 +01:00
SCFToSPIRV [MLIR][SPIRV] Rename `spv.selection` to `spv.mlir.selection`. 2021-03-06 16:05:31 +01:00
SCFToStandard [mlir][OpFormatGen] Format enum attribute cases as keywords when possible 2021-01-14 11:35:49 -08:00
SPIRVToLLVM [MLIR][SPIRV] Rename `spv.selection` to `spv.mlir.selection`. 2021-03-06 16:05:31 +01:00
ShapeToStandard [mlir][Shape] Allow shape.split_at to return extent tensors and lower it to std.subtensor 2021-03-08 16:48:05 +01:00
StandardToLLVM Revert "[MLIR] Create memref dialect and move several dialect-specific ops from std." 2021-02-18 12:49:52 +01:00
StandardToSPIRV [mlir][spirv] Convert tensor.extract for very small tensors 2021-03-06 08:03:36 -05:00
TosaToLinalg [MLIR][TOSA] Added lowerings for Reduce operations to Linalg 2021-03-08 10:57:19 -08:00
TosaToSCF [MLIR][TOSA] Resubmit Tosa to Standard/SCF Lowerings (const, if, while)" 2021-02-26 17:44:12 -08:00
TosaToStandard [MLIR][TOSA] Resubmit Tosa to Standard/SCF Lowerings (const, if, while)" 2021-02-26 17:44:12 -08:00
VectorToLLVM [mlir][vector] add higher dimensional support to gather/scatter 2021-02-26 14:20:19 -08:00
VectorToROCDL [mlir] use built-in vector types instead of LLVM dialect types when possible 2021-01-12 10:04:28 +01:00
VectorToSCF Revert "[MLIR] Create memref dialect and move several dialect-specific ops from std." 2021-02-18 12:49:52 +01:00
VectorToSPIRV [mlir][spirv] Add more vector conversion patterns 2021-02-05 09:11:16 -05:00