forked from OSchip/llvm-project
383 lines
11 KiB
C++
383 lines
11 KiB
C++
//===-- Hexagon.cpp -------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "InputFiles.h"
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#include "Symbols.h"
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#include "SyntheticSections.h"
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#include "Target.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/BinaryFormat/ELF.h"
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#include "llvm/Object/ELF.h"
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#include "llvm/Support/Endian.h"
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using namespace llvm;
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using namespace llvm::object;
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using namespace llvm::support::endian;
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using namespace llvm::ELF;
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namespace lld {
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namespace elf {
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namespace {
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class Hexagon final : public TargetInfo {
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public:
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Hexagon();
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uint32_t calcEFlags() const override;
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RelExpr getRelExpr(RelType type, const Symbol &s,
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const uint8_t *loc) const override;
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RelType getDynRel(RelType type) const override;
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void relocate(uint8_t *loc, const Relocation &rel,
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uint64_t val) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, const Symbol &sym,
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uint64_t pltEntryAddr) const override;
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};
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} // namespace
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Hexagon::Hexagon() {
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pltRel = R_HEX_JMP_SLOT;
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relativeRel = R_HEX_RELATIVE;
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gotRel = R_HEX_GLOB_DAT;
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symbolicRel = R_HEX_32;
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// The zero'th GOT entry is reserved for the address of _DYNAMIC. The
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// next 3 are reserved for the dynamic loader.
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gotPltHeaderEntriesNum = 4;
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pltEntrySize = 16;
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pltHeaderSize = 32;
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// Hexagon Linux uses 64K pages by default.
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defaultMaxPageSize = 0x10000;
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noneRel = R_HEX_NONE;
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tlsGotRel = R_HEX_TPREL_32;
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tlsModuleIndexRel = R_HEX_DTPMOD_32;
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tlsOffsetRel = R_HEX_DTPREL_32;
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}
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uint32_t Hexagon::calcEFlags() const {
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assert(!objectFiles.empty());
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// The architecture revision must always be equal to or greater than
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// greatest revision in the list of inputs.
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uint32_t ret = 0;
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for (InputFile *f : objectFiles) {
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uint32_t eflags = cast<ObjFile<ELF32LE>>(f)->getObj().getHeader()->e_flags;
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if (eflags > ret)
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ret = eflags;
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}
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return ret;
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}
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static uint32_t applyMask(uint32_t mask, uint32_t data) {
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uint32_t result = 0;
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size_t off = 0;
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for (size_t bit = 0; bit != 32; ++bit) {
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uint32_t valBit = (data >> off) & 1;
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uint32_t maskBit = (mask >> bit) & 1;
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if (maskBit) {
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result |= (valBit << bit);
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++off;
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}
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}
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return result;
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}
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RelExpr Hexagon::getRelExpr(RelType type, const Symbol &s,
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const uint8_t *loc) const {
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switch (type) {
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case R_HEX_NONE:
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return R_NONE;
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case R_HEX_6_X:
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case R_HEX_8_X:
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case R_HEX_9_X:
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case R_HEX_10_X:
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case R_HEX_11_X:
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case R_HEX_12_X:
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case R_HEX_16_X:
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case R_HEX_32:
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case R_HEX_32_6_X:
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case R_HEX_HI16:
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case R_HEX_LO16:
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case R_HEX_DTPREL_32:
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return R_ABS;
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case R_HEX_B9_PCREL:
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case R_HEX_B13_PCREL:
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case R_HEX_B15_PCREL:
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case R_HEX_6_PCREL_X:
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case R_HEX_32_PCREL:
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return R_PC;
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case R_HEX_B9_PCREL_X:
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case R_HEX_B15_PCREL_X:
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case R_HEX_B22_PCREL:
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case R_HEX_PLT_B22_PCREL:
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case R_HEX_B22_PCREL_X:
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case R_HEX_B32_PCREL_X:
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return R_PLT_PC;
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case R_HEX_IE_32_6_X:
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case R_HEX_IE_16_X:
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case R_HEX_IE_HI16:
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case R_HEX_IE_LO16:
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return R_GOT;
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case R_HEX_GD_GOT_11_X:
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case R_HEX_GD_GOT_16_X:
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case R_HEX_GD_GOT_32_6_X:
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return R_TLSGD_GOTPLT;
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case R_HEX_GOTREL_11_X:
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case R_HEX_GOTREL_16_X:
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case R_HEX_GOTREL_32_6_X:
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case R_HEX_GOTREL_HI16:
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case R_HEX_GOTREL_LO16:
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return R_GOTPLTREL;
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case R_HEX_GOT_11_X:
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case R_HEX_GOT_16_X:
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case R_HEX_GOT_32_6_X:
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return R_GOTPLT;
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case R_HEX_IE_GOT_11_X:
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case R_HEX_IE_GOT_16_X:
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case R_HEX_IE_GOT_32_6_X:
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case R_HEX_IE_GOT_HI16:
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case R_HEX_IE_GOT_LO16:
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config->hasStaticTlsModel = true;
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return R_GOTPLT;
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case R_HEX_TPREL_11_X:
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case R_HEX_TPREL_16:
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case R_HEX_TPREL_16_X:
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case R_HEX_TPREL_32_6_X:
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case R_HEX_TPREL_HI16:
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case R_HEX_TPREL_LO16:
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return R_TLS;
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default:
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error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
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") against symbol " + toString(s));
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return R_NONE;
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}
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}
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static uint32_t findMaskR6(uint32_t insn) {
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// There are (arguably too) many relocation masks for the DSP's
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// R_HEX_6_X type. The table below is used to select the correct mask
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// for the given instruction.
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struct InstructionMask {
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uint32_t cmpMask;
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uint32_t relocMask;
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};
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static const InstructionMask r6[] = {
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{0x38000000, 0x0000201f}, {0x39000000, 0x0000201f},
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{0x3e000000, 0x00001f80}, {0x3f000000, 0x00001f80},
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{0x40000000, 0x000020f8}, {0x41000000, 0x000007e0},
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{0x42000000, 0x000020f8}, {0x43000000, 0x000007e0},
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{0x44000000, 0x000020f8}, {0x45000000, 0x000007e0},
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{0x46000000, 0x000020f8}, {0x47000000, 0x000007e0},
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{0x6a000000, 0x00001f80}, {0x7c000000, 0x001f2000},
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{0x9a000000, 0x00000f60}, {0x9b000000, 0x00000f60},
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{0x9c000000, 0x00000f60}, {0x9d000000, 0x00000f60},
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{0x9f000000, 0x001f0100}, {0xab000000, 0x0000003f},
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{0xad000000, 0x0000003f}, {0xaf000000, 0x00030078},
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{0xd7000000, 0x006020e0}, {0xd8000000, 0x006020e0},
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{0xdb000000, 0x006020e0}, {0xdf000000, 0x006020e0}};
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// Duplex forms have a fixed mask and parse bits 15:14 are always
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// zero. Non-duplex insns will always have at least one bit set in the
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// parse field.
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if ((0xC000 & insn) == 0x0)
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return 0x03f00000;
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for (InstructionMask i : r6)
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if ((0xff000000 & insn) == i.cmpMask)
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return i.relocMask;
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error("unrecognized instruction for R_HEX_6 relocation: 0x" +
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utohexstr(insn));
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return 0;
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}
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static uint32_t findMaskR8(uint32_t insn) {
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if ((0xff000000 & insn) == 0xde000000)
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return 0x00e020e8;
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if ((0xff000000 & insn) == 0x3c000000)
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return 0x0000207f;
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return 0x00001fe0;
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}
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static uint32_t findMaskR11(uint32_t insn) {
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if ((0xff000000 & insn) == 0xa1000000)
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return 0x060020ff;
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return 0x06003fe0;
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}
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static uint32_t findMaskR16(uint32_t insn) {
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if ((0xff000000 & insn) == 0x48000000)
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return 0x061f20ff;
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if ((0xff000000 & insn) == 0x49000000)
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return 0x061f3fe0;
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if ((0xff000000 & insn) == 0x78000000)
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return 0x00df3fe0;
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if ((0xff000000 & insn) == 0xb0000000)
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return 0x0fe03fe0;
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error("unrecognized instruction for R_HEX_16_X relocation: 0x" +
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utohexstr(insn));
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return 0;
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}
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static void or32le(uint8_t *p, int32_t v) { write32le(p, read32le(p) | v); }
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void Hexagon::relocate(uint8_t *loc, const Relocation &rel,
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uint64_t val) const {
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switch (rel.type) {
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case R_HEX_NONE:
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break;
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case R_HEX_6_PCREL_X:
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case R_HEX_6_X:
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or32le(loc, applyMask(findMaskR6(read32le(loc)), val));
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break;
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case R_HEX_8_X:
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or32le(loc, applyMask(findMaskR8(read32le(loc)), val));
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break;
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case R_HEX_9_X:
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or32le(loc, applyMask(0x00003fe0, val & 0x3f));
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break;
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case R_HEX_10_X:
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or32le(loc, applyMask(0x00203fe0, val & 0x3f));
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break;
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case R_HEX_11_X:
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case R_HEX_GD_GOT_11_X:
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case R_HEX_IE_GOT_11_X:
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case R_HEX_GOT_11_X:
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case R_HEX_GOTREL_11_X:
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case R_HEX_TPREL_11_X:
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or32le(loc, applyMask(findMaskR11(read32le(loc)), val & 0x3f));
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break;
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case R_HEX_12_X:
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or32le(loc, applyMask(0x000007e0, val));
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break;
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case R_HEX_16_X: // These relocs only have 6 effective bits.
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case R_HEX_IE_16_X:
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case R_HEX_IE_GOT_16_X:
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case R_HEX_GD_GOT_16_X:
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case R_HEX_GOT_16_X:
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case R_HEX_GOTREL_16_X:
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case R_HEX_TPREL_16_X:
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or32le(loc, applyMask(findMaskR16(read32le(loc)), val & 0x3f));
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break;
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case R_HEX_TPREL_16:
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or32le(loc, applyMask(findMaskR16(read32le(loc)), val & 0xffff));
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break;
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case R_HEX_32:
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case R_HEX_32_PCREL:
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case R_HEX_DTPREL_32:
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or32le(loc, val);
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break;
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case R_HEX_32_6_X:
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case R_HEX_GD_GOT_32_6_X:
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case R_HEX_GOT_32_6_X:
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case R_HEX_GOTREL_32_6_X:
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case R_HEX_IE_GOT_32_6_X:
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case R_HEX_IE_32_6_X:
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case R_HEX_TPREL_32_6_X:
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or32le(loc, applyMask(0x0fff3fff, val >> 6));
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break;
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case R_HEX_B9_PCREL:
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checkInt(loc, val, 11, rel);
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or32le(loc, applyMask(0x003000fe, val >> 2));
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break;
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case R_HEX_B9_PCREL_X:
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or32le(loc, applyMask(0x003000fe, val & 0x3f));
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break;
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case R_HEX_B13_PCREL:
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checkInt(loc, val, 15, rel);
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or32le(loc, applyMask(0x00202ffe, val >> 2));
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break;
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case R_HEX_B15_PCREL:
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checkInt(loc, val, 17, rel);
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or32le(loc, applyMask(0x00df20fe, val >> 2));
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break;
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case R_HEX_B15_PCREL_X:
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or32le(loc, applyMask(0x00df20fe, val & 0x3f));
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break;
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case R_HEX_B22_PCREL:
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case R_HEX_PLT_B22_PCREL:
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checkInt(loc, val, 22, rel);
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or32le(loc, applyMask(0x1ff3ffe, val >> 2));
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break;
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case R_HEX_B22_PCREL_X:
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or32le(loc, applyMask(0x1ff3ffe, val & 0x3f));
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break;
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case R_HEX_B32_PCREL_X:
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or32le(loc, applyMask(0x0fff3fff, val >> 6));
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break;
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case R_HEX_GOTREL_HI16:
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case R_HEX_HI16:
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case R_HEX_IE_GOT_HI16:
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case R_HEX_IE_HI16:
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case R_HEX_TPREL_HI16:
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or32le(loc, applyMask(0x00c03fff, val >> 16));
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break;
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case R_HEX_GOTREL_LO16:
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case R_HEX_LO16:
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case R_HEX_IE_GOT_LO16:
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case R_HEX_IE_LO16:
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case R_HEX_TPREL_LO16:
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or32le(loc, applyMask(0x00c03fff, val));
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break;
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default:
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llvm_unreachable("unknown relocation");
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}
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}
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void Hexagon::writePltHeader(uint8_t *buf) const {
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const uint8_t pltData[] = {
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0x00, 0x40, 0x00, 0x00, // { immext (#0)
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0x1c, 0xc0, 0x49, 0x6a, // r28 = add (pc, ##GOT0@PCREL) } # @GOT0
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0x0e, 0x42, 0x9c, 0xe2, // { r14 -= add (r28, #16) # offset of GOTn
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0x4f, 0x40, 0x9c, 0x91, // r15 = memw (r28 + #8) # object ID at GOT2
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0x3c, 0xc0, 0x9c, 0x91, // r28 = memw (r28 + #4) }# dynamic link at GOT1
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0x0e, 0x42, 0x0e, 0x8c, // { r14 = asr (r14, #2) # index of PLTn
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0x00, 0xc0, 0x9c, 0x52, // jumpr r28 } # call dynamic linker
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0x0c, 0xdb, 0x00, 0x54, // trap0(#0xdb) # bring plt0 into 16byte alignment
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};
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memcpy(buf, pltData, sizeof(pltData));
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// Offset from PLT0 to the GOT.
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uint64_t off = in.gotPlt->getVA() - in.plt->getVA();
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relocateNoSym(buf, R_HEX_B32_PCREL_X, off);
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relocateNoSym(buf + 4, R_HEX_6_PCREL_X, off);
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}
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void Hexagon::writePlt(uint8_t *buf, const Symbol &sym,
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uint64_t pltEntryAddr) const {
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const uint8_t inst[] = {
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0x00, 0x40, 0x00, 0x00, // { immext (#0)
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0x0e, 0xc0, 0x49, 0x6a, // r14 = add (pc, ##GOTn@PCREL) }
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0x1c, 0xc0, 0x8e, 0x91, // r28 = memw (r14)
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0x00, 0xc0, 0x9c, 0x52, // jumpr r28
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};
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memcpy(buf, inst, sizeof(inst));
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uint64_t gotPltEntryAddr = sym.getGotPltVA();
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relocateNoSym(buf, R_HEX_B32_PCREL_X, gotPltEntryAddr - pltEntryAddr);
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relocateNoSym(buf + 4, R_HEX_6_PCREL_X, gotPltEntryAddr - pltEntryAddr);
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}
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RelType Hexagon::getDynRel(RelType type) const {
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if (type == R_HEX_32)
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return type;
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return R_HEX_NONE;
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}
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TargetInfo *getHexagonTargetInfo() {
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static Hexagon target;
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return ⌖
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}
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} // namespace elf
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} // namespace lld
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