forked from OSchip/llvm-project
0a9c1ef2eb
Current implementation of parseLoopStructure interprets the latch comparison as a comarison against `iv.next`. If the actual comparison is made against the `iv` current value then the loop may be rejected, because this misinterpretation leads to incorrect evaluation of the latch start value. This patch teaches the IRCE to distinguish this kind of loops and perform the optimization for them. Now we use `IndVarBase` variable which can be either next or current value of the induction variable (previously we used `IndVarNext` which was always the value on next iteration). Differential Revision: https://reviews.llvm.org/D36215 llvm-svn: 312221 |
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add-metadata-pre-post-loops.ll | ||
bad-loop-structure.ll | ||
bug-loop-varying-upper-limit.ll | ||
bug-mismatched-types.ll | ||
clamp.ll | ||
conjunctive-checks.ll | ||
correct-loop-info.ll | ||
decrementing-loop.ll | ||
eq_ne.ll | ||
latch-comparison-against-current-value.ll | ||
low-becount.ll | ||
multiple-access-no-preloop.ll | ||
not-likely-taken.ll | ||
only-lower-check.ll | ||
only-upper-check.ll | ||
pre_post_loops.ll | ||
single-access-no-preloop.ll | ||
single-access-with-preloop.ll | ||
skip-profitability-checks.ll | ||
stride_more_than_1.ll | ||
unhandled.ll | ||
unsigned_comparisons_ugt.ll | ||
unsigned_comparisons_ult.ll | ||
with-parent-loops.ll |