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llvm-project/llvm/test/DebugInfo/MIR/X86
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Hans Wennborg 49da20ddb4 Revert 30e8f80fd5 "[DebugInfo] Don't create multiple DBG_VALUEs when sinking" 
This caused non-determinism in the compiler, see command on the Phabricator
code review.

> This patch addresses a performance problem reported in PR43855, and
> present in the reapplication in in 001574938e5. It turns out that
> MachineSink will (often) move instructions to the first block that
> post-dominates the current block, and then try to sink further. This
> means if we have a lot of conditionals, we can needlessly create large
> numbers of DBG_VALUEs, one in each block the sunk instruction passes
> through.
>
> To fix this, rather than immediately sinking DBG_VALUEs, record them in
> a pass structure. When sinking is complete and instructions won't be
> sunk any further, new DBG_VALUEs are added, avoiding lots of
> intermediate DBG_VALUE $noregs being created.
>
> Differential revision: https://reviews.llvm.org/D70676
 		2019-12-10 19:20:11 +01:00
..
DW_OP_entry_value.mir [DebugInfo] Remove the DIFlagArgumentNotModified debug info flag 2019-11-20 13:18:40 +01:00
avoid-single-entry-value-location.mir [DebugInfo] Remove the DIFlagArgumentNotModified debug info flag 2019-11-20 13:18:40 +01:00
bit-piece-dh.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
clobbered-fragments.mir [DebugInfo] Track multiple registers in DbgEntityHistoryCalculator 2019-04-10 11:28:28 +00:00
dbg-call-site-spilled-arg.mir [DebugInfo] Remove the DIFlagArgumentNotModified debug info flag 2019-11-20 13:18:40 +01:00
dbg-stack-value-range.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
dbgcall-site-copy-super-sub.mir [DebugInfo] Make describeLoadedValue() reg aware 2019-12-09 10:47:49 +01:00
dbgcall-site-interpretation.mir [DebugInfo] Remove the DIFlagArgumentNotModified debug info flag 2019-11-20 13:18:40 +01:00
dbgcall-site-lea-interpretation.mir [DebugInfo] Make describeLoadedValue() reg aware 2019-12-09 10:47:49 +01:00
dbgcall-site-two-fwd-reg-defs.mir [DebugInfo] Make describeLoadedValue() reg aware 2019-12-09 10:47:49 +01:00
dbginfo-entryvals.mir [DebugInfo] Remove the DIFlagArgumentNotModified debug info flag 2019-11-20 13:18:40 +01:00
debug-call-site-param.mir [DebugInfo] Remove the DIFlagArgumentNotModified debug info flag 2019-11-20 13:18:40 +01:00
debug-loc-0.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
empty-inline.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
entry-value-of-modified-param.mir Reland "[LiveDebugValues] Introduce entry values of unmodified params" 2019-12-05 11:10:49 +01:00
entry-values-diamond-bbs.mir Reland "[LiveDebugValues] Introduce entry values of unmodified params" 2019-12-05 11:10:49 +01:00
kill-after-spill.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
kill-entry-value-after-diamond-bbs.mir Reland "[LiveDebugValues] Introduce entry values of unmodified params" 2019-12-05 11:10:49 +01:00
lit.local.cfg
…
live-debug-values-3preds.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
live-debug-values-bad-transfer.mir [DebugInfo] LiveDebugValues: defer DBG_VALUE creation during analysis 2019-10-04 09:38:05 +00:00
live-debug-values-entry-transfer.mir [DebugInfo] LiveDebugValues should always revisit backedges if it skips them 2019-08-29 10:53:29 +00:00
live-debug-values-fragments.mir [X86] Add target triple for live-debug-values-fragments.mir 2019-06-14 01:41:04 +00:00
live-debug-values-reg-copy.mir Reland [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2) 2019-10-29 16:13:07 +00:00
live-debug-values-restore-collide.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
live-debug-values-restore.mir [DebugInfo] LiveDebugValues: move DBG_VALUE creation into VarLoc class 2019-10-04 10:53:47 +00:00
live-debug-values-spill.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
live-debug-values-stack-clobber.mir [DebugInfo] LiveDebugValues: explicitly terminate overwritten stack locations 2019-09-06 10:08:22 +00:00
live-debug-values.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
live-debug-vars-unused-arg-debugonly.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
live-debug-vars-unused-arg.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
livedebugvalues-limit.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
livedebugvars-crossbb-interval.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
machine-cse.mir [DebugInfo] LiveDebugValues: correctly discriminate kinds of variable locations 2019-09-02 12:28:36 +00:00
machinesink.mir Revert 30e8f80fd5 "[DebugInfo] Don't create multiple DBG_VALUEs when sinking" 2019-12-10 19:20:11 +01:00
mlicm-hoist.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
multiple-param-dbg-value-entry.mir [DebugInfo] Remove the DIFlagArgumentNotModified debug info flag 2019-11-20 13:18:40 +01:00
no-cfi-loc.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
postra-subreg-sink.mir [DebugInfo] Re-apply two patches to MachineSink 2019-12-05 15:52:20 +00:00
prolog-epilog-indirection.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
propagate-entry-value-cross-bbs.mir Reland "[LiveDebugValues] Introduce entry values of unmodified params" 2019-12-05 11:10:49 +01:00
regcoalescer.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
regcoalescing-clears-dead-dbgvals.mir [DebugInfo] Avoid register coalesing unsoundly changing DBG_VALUE locations 2019-11-25 13:47:06 +00:00
sink-leaves-undef.mir [DebugInfo] Re-apply two patches to MachineSink 2019-12-05 15:52:20 +00:00
unreachable-block-call-site.mir [DebugInfo] Remove call sites when eliminating unreachable blocks 2019-08-12 13:22:29 +00:00