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Emilio Cota 57c56cf20c X86Vector: relax checks in rsqrt's integration test 
Instead of hard-coding results for both Intel and AMD, let's relax
the checks to simplify the test while supporting both implementations.
Note that:
- If a new hardware implementation comes up in the future, it is likely
  to pass the relaxed tests, i.e. no future maintenance burden for us.
- If something terribly wrong happens (e.g. instead of rsqrt we
  execute 1/sqrt), the tests will probably catch it, since the relaxed
  tests expect low precision (e.g. rsqrt(1) != 1.0).

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D111461
 		2021-10-08 13:59:18 -07:00
..
cmake/modules
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docs [MLIR] Update DRR doc with returnType directive 2021-10-06 17:32:40 +00:00
examples
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include [NFC] Make some includes explicit 2021-10-08 20:34:48 +02:00
lib Fix parsing of hex-format index dense tensor attributes. 2021-10-08 15:44:02 +00:00
python [mlir][python] support taking ops instead of values in op constructors 2021-10-08 09:49:48 +02:00
test X86Vector: relax checks in rsqrt's integration test 2021-10-08 13:59:18 -07:00
tools [mlir][python] support taking ops instead of values in op constructors 2021-10-08 09:49:48 +02:00
unittests [mlir] Tighten strided layout specification. 2021-10-04 10:37:05 +00:00
utils [mlir][spirv] Fix path in define_enum.sh script 2021-10-05 09:32:01 -04:00
.clang-format
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.clang-tidy
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CMakeLists.txt evert "[mlir] Limit Python dependency to Development.Module when possible." 2021-10-08 05:18:52 +00:00
LICENSE.TXT
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README.md
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README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.