forked from OSchip/llvm-project
509a4947c9
We need to propagate this information from the IR in order to be able to safely do tail call optimizations on the intrinsics during legalization. Assuming it's safe to do tail call opt without checking for the marker isn't safe because the mem libcall may use allocas from the caller. This adds an extra immediate operand to the end of the intrinsics and fixes the legalizer to handle it. Differential Revision: https://reviews.llvm.org/D68151 llvm-svn: 373140 |
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test_copy.mir | ||
test_copy_mismatch_types.mir | ||
test_g_add.mir | ||
test_g_addrspacecast.mir | ||
test_g_bitcast.mir | ||
test_g_brjt.mir | ||
test_g_build_vector.mir | ||
test_g_build_vector_trunc.mir | ||
test_g_concat_vectors.mir | ||
test_g_constant.mir | ||
test_g_dyn_stackalloc.mir | ||
test_g_extract.mir | ||
test_g_fcmp.mir | ||
test_g_fconstant.mir | ||
test_g_gep.mir | ||
test_g_icmp.mir | ||
test_g_insert.mir | ||
test_g_intrinsic.mir | ||
test_g_intrinsic_w_side_effects.mir | ||
test_g_inttoptr.mir | ||
test_g_jump_table.mir | ||
test_g_load.mir | ||
test_g_merge_values.mir | ||
test_g_phi.mir | ||
test_g_ptrtoint.mir | ||
test_g_select.mir | ||
test_g_sext_inreg.mir | ||
test_g_sextload.mir | ||
test_g_shuffle_vector.mir | ||
test_g_store.mir | ||
test_g_trunc.mir | ||
test_g_zextload.mir | ||
test_memccpy_intrinsics.mir | ||
test_phis_precede_nonphis.mir | ||
verifier-generic-extend-truncate.mir | ||
verifier-generic-types-1.mir | ||
verifier-generic-types-2.mir | ||
verifier-implicit-virtreg-invalid-physreg-liveness.mir | ||
verifier-phi-fail0.mir | ||
verifier-phi.mir | ||
verifier-pseudo-terminators.mir | ||
verify-regbankselected.mir | ||
verify-selected.mir |