forked from OSchip/llvm-project
17 lines
724 B
LLVM
17 lines
724 B
LLVM
; RUN: llc -o - %s -march=amdgcn -mcpu=verde -verify-machineinstrs -stop-after finalize-isel | FileCheck %s
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; This test verifies that the instruction selection will add the implicit
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; register operands in the correct order when modifying the opcode of an
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; instruction to V_ADD_I32_e32.
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; CHECK: %{{[0-9]+}}:vgpr_32 = V_ADD_I32_e32 %{{[0-9]+}}, %{{[0-9]+}}, implicit-def $vcc, implicit $exec
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define amdgpu_kernel void @test(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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entry:
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%b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
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%a = load volatile i32, i32 addrspace(1)* %in
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%b = load volatile i32, i32 addrspace(1)* %b_ptr
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%result = add i32 %a, %b
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store i32 %result, i32 addrspace(1)* %out
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ret void
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}
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