forked from OSchip/llvm-project
2ddfc5e60f
Summary: Don't fold (zext (and (load x), cst)) -> (and (zextload x), (zext cst)) if (and (load x) cst) will match as a zextload already and has additional users. For example, the following IR: %load = load i32, i32* %ptr, align 8 %load16 = and i32 %load, 65535 %load64 = zext i32 %load16 to i64 store i32 %load16, i32* %dst1, align 4 store i64 %load64, i64* %dst2, align 8 used to produce the following aarch64 code: ldr w8, [x0] and w9, w8, #0xffff and x8, x8, #0xffff str w9, [x1] str x8, [x2] but with this change produces the following aarch64 code: ldrh w8, [x0] str w8, [x1] str x8, [x2] Reviewers: resistor, mcrosier Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14340 llvm-svn: 252789 |
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| .. | ||
| CMakeLists.txt | ||
| DAGCombiner.cpp | ||
| FastISel.cpp | ||
| FunctionLoweringInfo.cpp | ||
| InstrEmitter.cpp | ||
| InstrEmitter.h | ||
| LLVMBuild.txt | ||
| LegalizeDAG.cpp | ||
| LegalizeFloatTypes.cpp | ||
| LegalizeIntegerTypes.cpp | ||
| LegalizeTypes.cpp | ||
| LegalizeTypes.h | ||
| LegalizeTypesGeneric.cpp | ||
| LegalizeVectorOps.cpp | ||
| LegalizeVectorTypes.cpp | ||
| Makefile | ||
| ResourcePriorityQueue.cpp | ||
| SDNodeDbgValue.h | ||
| ScheduleDAGFast.cpp | ||
| ScheduleDAGRRList.cpp | ||
| ScheduleDAGSDNodes.cpp | ||
| ScheduleDAGSDNodes.h | ||
| ScheduleDAGVLIW.cpp | ||
| SelectionDAG.cpp | ||
| SelectionDAGBuilder.cpp | ||
| SelectionDAGBuilder.h | ||
| SelectionDAGDumper.cpp | ||
| SelectionDAGISel.cpp | ||
| SelectionDAGPrinter.cpp | ||
| StatepointLowering.cpp | ||
| StatepointLowering.h | ||
| TargetLowering.cpp | ||
| TargetSelectionDAGInfo.cpp | ||