llvm-project/llvm/test/CodeGen/CellSPU
Chandler Carruth 4190b507c5 Flip the new block-placement pass to be on by default.
This is mostly to test the waters. I'd like to get results from FNT
build bots and other bots running on non-x86 platforms.

This feature has been pretty heavily tested over the last few months by
me, and it fixes several of the execution time regressions caused by the
inlining work by preventing inlining decisions from radically impacting
block layout.

I've seen very large improvements in yacr2 and ackermann benchmarks,
along with the expected noise across all of the benchmark suite whenever
code layout changes. I've analyzed all of the regressions and fixed
them, or found them to be impossible to fix. See my email to llvmdev for
more details.

I'd like for this to be in 3.1 as it complements the inliner changes,
but if any failures are showing up or anyone has concerns, it is just
a flag flip and so can be easily turned off.

I'm switching it on tonight to try and get at least one run through
various folks' performance suites in case SPEC or something else has
serious issues with it. I'll watch bots and revert if anything shows up.

llvm-svn: 154816
2012-04-16 13:49:17 +00:00
..
useful-harnesses
2009-01-01-BrCond.ll Flip the new block-placement pass to be on by default. 2012-04-16 13:49:17 +00:00
2010-04-07-DbgValueOtherTargets.ll
and_ops.ll Reapply r143206, with fixes. Disallow physical register lifetimes 2011-11-03 21:49:52 +00:00
arg_ret.ll
bigstack.ll
bss.ll Be nice to Xcore and the XMOS assembler and avoid quoting section names 2011-03-04 20:03:14 +00:00
call.ll Remove histogram tests. 2011-11-12 22:39:40 +00:00
crash.ll
ctpop.ll
div_ops.ll
dp_farith.ll
eqv.ll manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
extract_elt.ll
fcmp32.ll
fcmp64.ll
fdiv.ll
fneg-fabs.ll
i8ops.ll
i64ops.ll
icmp8.ll
icmp16.ll
icmp32.ll
icmp64.ll
immed16.ll
immed32.ll
immed64.ll
int2fp.ll
intrinsics_branch.ll
intrinsics_float.ll
intrinsics_logical.ll
jumptable.ll Mark 'branch indirect' instruction as an indirect branch. 2011-10-13 11:40:03 +00:00
lit.local.cfg Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
loads.ll Allow load from constant on SPU. 2011-03-04 12:00:11 +00:00
mul-with-overflow.ll manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
mul_ops.ll
nand.ll Reapply r143206, with fixes. Disallow physical register lifetimes 2011-11-03 21:49:52 +00:00
or_ops.ll Reapply r143206, with fixes. Disallow physical register lifetimes 2011-11-03 21:49:52 +00:00
private.ll make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
rotate_ops.ll 1. Remove the part of r153848 which optimizes shuffle-of-shuffle into a new 2012-04-07 21:19:08 +00:00
select_bits.ll Reapply r143206, with fixes. Disallow physical register lifetimes 2011-11-03 21:49:52 +00:00
sext128.ll Allow sign-extending of i8 and i16 to i128 on SPU. 2011-01-20 15:49:06 +00:00
shift_ops.ll Enable element promotion type legalization by deafault. 2011-10-16 20:31:33 +00:00
shuffles.ll Enable element promotion type legalization by deafault. 2011-10-16 20:31:33 +00:00
sp_farith.ll
stores.ll Allow load from constant on SPU. 2011-03-04 12:00:11 +00:00
storestruct.ll
struct_1.ll Reapply r143206, with fixes. Disallow physical register lifetimes 2011-11-03 21:49:52 +00:00
sub_ops.ll
trunc.ll
v2f32.ll don't test for codegen of 'store undef' 2011-04-09 02:31:26 +00:00
v2i32.ll Enable element promotion type legalization by deafault. 2011-10-16 20:31:33 +00:00
vec_const.ll
vecinsert.ll