forked from OSchip/llvm-project
52 lines
1.9 KiB
C++
52 lines
1.9 KiB
C++
//===- Mips.td - Describe the Mips Target Machine ---------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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// This is the top level entry point for the Mips target.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Target-independent interfaces
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//===----------------------------------------------------------------------===//
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include "../Target.td"
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//===----------------------------------------------------------------------===//
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// Descriptions
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//===----------------------------------------------------------------------===//
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include "MipsRegisterInfo.td"
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include "MipsSchedule.td"
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include "MipsInstrInfo.td"
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include "MipsCallingConv.td"
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def MipsInstrInfo : InstrInfo {
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let TSFlagsFields = [];
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let TSFlagsShifts = [];
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}
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//===----------------------------------------------------------------------===//
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// CPU Directives //
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//===----------------------------------------------------------------------===//
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// Not currently supported, but work as SubtargetFeature placeholder.
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def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true",
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"MipsIII ISA Support">;
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//===----------------------------------------------------------------------===//
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// Mips processors supported.
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//===----------------------------------------------------------------------===//
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def : Processor<"mips1", MipsGenericItineraries, []>;
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def : Processor<"r2000", MipsGenericItineraries, []>;
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def : Processor<"r3000", MipsGenericItineraries, []>;
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def Mips : Target {
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let InstructionSet = MipsInstrInfo;
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}
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