llvm-project/llvm/test/MC/X86
Craig Topper 2ce1a697f0 [X86] Always use 16-bit displacement in 16-bit mode when there is no base or index register.
Previously we only did this if the immediate fit in 16 bits, but
the GNU assembler seems to just truncate.

Fixes PR46952
2020-09-15 19:31:48 -07:00
..
AMX [X86-64] Support Intel AMX instructions 2020-07-02 08:57:04 +08:00
AlignedBundling [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
Inputs [NFC][X86] Simplify test cases for branch align 2020-03-16 16:30:29 +08:00
3DNow.s
2011-09-06-NoNewline.s
AES-32.s
AES-64.s
AVX-32.s [X86] Add support for {vex2}, {vex3}, and {evex} to the assembler to match gas. Use {evex} to improve the one our 32-bit AVX512 tests. 2019-04-09 18:45:15 +00:00
AVX-64.s [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
AVX2-32.s
AVX2-64.s
AVX512F_512-32.s [X86] Move the 'vmovq.s' and similar assembly strings for EVEX vector moves with reversed operands to InstAliases. 2018-06-18 01:28:05 +00:00
AVX512F_512-64.s [X86] Move the 'vmovq.s' and similar assembly strings for EVEX vector moves with reversed operands to InstAliases. 2018-06-18 01:28:05 +00:00
AVX512F_SCALAR-32.s [X86] Add support for {vex2}, {vex3}, and {evex} to the assembler to match gas. Use {evex} to improve the one our 32-bit AVX512 tests. 2019-04-09 18:45:15 +00:00
AVX512F_SCALAR-64.s [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
AVXAES-32.s
AVXAES-64.s
BMI1-32.s
BMI1-64.s
BMI2-32.s
BMI2-64.s
CET-32.s [X86][CET]: Adding full coverage of MC encoding for the CET instructions.<NFC> 2018-02-20 08:00:31 +00:00
CET-64.s [X86][CET]: Adding full coverage of MC encoding for the CET instructions.<NFC> 2018-02-20 08:00:31 +00:00
CLFLUSHOPT-32.s
CLFLUSHOPT-64.s
CLFSH-32.s
CLFSH-64.s
CLWB-32.s
CLWB-64.s
CLZERO-32.s
CLZERO-64.s
F16C-32.s
F16C-64.s
FMA-32.s
FMA-64.s
FXSAVE-32.s
FXSAVE-64.s
FXSAVE64-64.s
I86-32.s [X86] Add coverage for 16-bit and 64-bit versions of bsf/bsr/bt/btc/btr/bts in the assembly tests that are supposed to provide full coverage. Add coverage for cwtl/cltq/cwtd/cqto as well. 2019-03-18 22:06:19 +00:00
I86-64.s [X86] Add coverage for 16-bit and 64-bit versions of bsf/bsr/bt/btc/btr/bts in the assembly tests that are supposed to provide full coverage. Add coverage for cwtl/cltq/cwtd/cqto as well. 2019-03-18 22:06:19 +00:00
I186-32.s
I186-64.s
I286-32.s [X86] Allow lsl/lar to be parsed with a GR16, GR32, or GR64 as source register. 2020-07-15 23:51:37 -07:00
I286-64.s [X86] Allow lsl/lar to be parsed with a GR16, GR32, or GR64 as source register. 2020-07-15 23:51:37 -07:00
I386-32.s [X86] Add coverage for 16-bit and 64-bit versions of bsf/bsr/bt/btc/btr/bts in the assembly tests that are supposed to provide full coverage. Add coverage for cwtl/cltq/cwtd/cqto as well. 2019-03-18 22:06:19 +00:00
I386-64.s [X86] Add coverage for 16-bit and 64-bit versions of bsf/bsr/bt/btc/btr/bts in the assembly tests that are supposed to provide full coverage. Add coverage for cwtl/cltq/cwtd/cqto as well. 2019-03-18 22:06:19 +00:00
I486-32.s
I486-64.s
INVPCID-32.s
INVPCID-64.s
LWP-32.s [X86] Adding full coverage of MC encoding for the XOP and LWP ISAs. 2019-01-02 18:09:41 +00:00
LWP-64.s [X86] Adding full coverage of MC encoding for the XOP and LWP ISAs. 2019-01-02 18:09:41 +00:00
MMX-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
MMX-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
PKU-32.s
PKU-64.s
POPCNT-32.s
POPCNT-64.s
PPRO-32.s [X86] Print %st(0) as %st when its implicit to the instruction. Continue printing it as %st(0) when its encoded in the instruction. 2019-02-04 04:15:10 +00:00
PPRO-64.s [X86] Print %st(0) as %st when its implicit to the instruction. Continue printing it as %st(0) when its encoded in the instruction. 2019-02-04 04:15:10 +00:00
PREFETCH-32.s
PREFETCH-64.s
RDPMC-32.s
RDPMC-64.s
RDRAND-32.s
RDRAND-64.s
RDSEED-32.s
RDSEED-64.s
RDTSCP-32.s
RDTSCP-64.s
RDWRFSGS-64.s
RTM.s
SHA-32.s
SHA-64.s
SSE-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE-64.s [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
SSE2-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE2-64.s [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
SSE3-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE3-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE4a-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE4a-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE41-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE41-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE42-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE42-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSEMXCSR-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSEMXCSR-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE_PREFETCH-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSE_PREFETCH-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSSE3-32.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SSSE3-64.s [X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC> 2019-02-02 06:21:54 +00:00
SVM-32.s [X86] Reverse the operand order of invlpga in at&t syntax to match gas. 2018-02-14 23:53:21 +00:00
SVM-64.s [X86] Reverse the operand order of invlpga in at&t syntax to match gas. 2018-02-14 23:53:21 +00:00
VMFUNC-32.s
VMFUNC-64.s
VTX-32.s
VTX-64.s
X86_64-pku.s
X87-32.s [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
X87-64.s [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
XOP-32.s [X86] Adding full coverage of MC encoding for the XOP and LWP ISAs. 2019-01-02 18:09:41 +00:00
XOP-64.s [X86] Adding full coverage of MC encoding for the XOP and LWP ISAs. 2019-01-02 18:09:41 +00:00
XSAVE-32.s
XSAVE-64.s
XSAVEC-32.s
XSAVEC-64.s
XSAVEOPT-32.s
XSAVEOPT-64.s
XSAVES-32.s
XSAVES-64.s
abs8.s Implemented sane default for llvm-objdump's relocation Value format 2018-06-01 05:31:58 +00:00
address-size.s [X86] Don't accept (%si,%bp) 16-bit address expressions. 2018-06-22 20:20:38 +00:00
align-branch-32bit.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-align.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-basic.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-boundary-default.s [NFC][X86] Simplify test cases for branch align 2020-03-16 16:30:29 +08:00
align-branch-bundle.s [X86] Enable multibyte NOPs in 64-bit mode for padding/alignment. 2020-07-01 23:59:01 -07:00
align-branch-enhanced-relaxation.s [X86][MC] Support enhanced relaxation for branch align 2020-04-08 19:08:19 +08:00
align-branch-fused.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-general.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-hardcode.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-mixed.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-necessary.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-negative.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-pad-max-prefix.s [X86] Enable multibyte NOPs in 64-bit mode for padding/alignment. 2020-07-01 23:59:01 -07:00
align-branch-prefix.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-relax-all.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-section-size.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
align-branch-section-type.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
align-branch-single.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-system.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-branch-variant-symbol.s [NFC][test] Refine tests for branch align 2020-04-11 13:04:52 +08:00
align-via-padding-corner.s [X86][MC] Disable Prefix padding after hardcode/prefix 2020-04-01 09:49:52 +08:00
align-via-padding.s [X86InstPrinter] Change printPCRelImm to print the target address in hexadecimal form 2020-03-26 08:28:59 -07:00
align-via-relaxation.s [X86InstPrinter] Change printPCRelImm to print the target address in hexadecimal form 2020-03-26 08:28:59 -07:00
avx512-encodings.s [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
avx512-err.s [X86][llvm-mc] Make the suffix matcher more accurate. 2020-05-27 14:45:17 +08:00
avx512_bf16-encoding.s [X86] Move files to correct directories after D60552 2019-05-06 09:24:36 +00:00
avx512_bf16_vl-encoding.s [X86] Move files to correct directories after D60552 2019-05-06 09:24:36 +00:00
avx512bitalg-encoding.s
avx512bw-encoding.s
avx512gfni-encoding.s
avx512ifma-encoding.s
avx512ifmavl-encoding.s
avx512vaes-encoding.s
avx512vbmi-encoding.s
avx512vbmi2-encoding.s
avx512vbmi2vl-encoding.s
avx512vl-encoding.s
avx512vl_bitalg-encoding.s
avx512vl_gfni-encoding.s
avx512vl_vaes-encoding.s
avx512vl_vnni-encoding.s
avx512vlvpclmul.s
avx512vnni-encoding.s
avx512vp2intersectvl-att.s [X86] Add VP2INTERSECT instructions 2019-05-31 02:50:41 +00:00
avx512vp2intersectvl-intel.s [X86] Add VP2INTERSECT instructions 2019-05-31 02:50:41 +00:00
avx512vpclmul.s
avx5124fmaps-encoding.s [X86] Add encoding tests for avx5124fmaps and avx5124vnni instructions. 2018-06-11 06:22:41 +00:00
avx5124vnniw-encoding.s [X86] Add encoding tests for avx5124fmaps and avx5124vnni instructions. 2018-06-11 06:22:41 +00:00
avx_vaes-encoding.s
cet-encoding.s
cfi-open-within-another-crash.s [MC][DWARF][AsmParser] Ensure nested CFI frames are diagnosed. 2018-10-19 12:14:30 +00:00
cfi-scope-errors.s [MC][DWARF][AsmParser] Ensure nested CFI frames are diagnosed. 2018-10-19 12:14:30 +00:00
cfi-scope-unclosed.s [MC] - Don't crash on unclosed frame. 2018-02-20 09:04:13 +00:00
cfi_def_cfa-crash.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
check-end-of-data-region.s Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
code16-32-64.s [llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` 2020-03-05 18:05:28 -08:00
code16gcc.s [X86] Properly encode a 32-bit address with an index register and no base register in 16-bit mode. 2020-07-27 21:11:42 -07:00
compact-unwind.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
crlf.test
data-prefix-fail.s [X86] Remove DATA32_PREFIX. Hack the printing for DATA16_PREFIX to print 'data32' in 16-bit mode. Hack the asm parser to convert 'data32' to 'data16' in 16-bit mode. 2018-04-22 00:52:02 +00:00
data-prefix16.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
data-prefix32.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
data-prefix64.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
directive-arch.s [X86] Parse and ignore .arch directives 2020-07-30 08:30:06 -07:00
disassemble-zeroes.s [llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` 2020-03-05 18:05:28 -08:00
dwarf-size-field-overflow.test Reduce the number of iterations in testcase. (NFC) 2019-11-21 08:32:55 -08:00
encoder-fail.s Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
error-reloc.s
eval-fill.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
expand-var.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
faultmap-section-parsing.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
fde-reloc.s
fixup-cpu-mode.s
fp-setup-macho.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
gather.s
gfni-encoding.s
gnux32-dwarf-gen.s
hex-immediates.s
i386-darwin-frame-register.ll Fix typo in comment 2020-04-09 10:36:00 +01:00
imm-comments.s
index-operations.s
inline-asm-obj.ll
intel-syntax-2.s [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
intel-syntax-32.s [X86] Don't accept (%si,%bp) 16-bit address expressions. 2018-06-22 20:20:38 +00:00
intel-syntax-ambiguous.s
intel-syntax-avx512-error.s
intel-syntax-avx512.s
intel-syntax-avx512_bf16.s [X86] Move files to correct directories after D60552 2019-05-06 09:24:36 +00:00
intel-syntax-avx512_bf16_vl.s [X86] Move files to correct directories after D60552 2019-05-06 09:24:36 +00:00
intel-syntax-bitwise-ops.s
intel-syntax-directional-label.s
intel-syntax-encoding.s X86: add alias for pushfw/popfw in Intel mode 2018-10-22 20:38:13 +00:00
intel-syntax-error.s [X86][AsmParser] Keep track of whether an explicit scale was specified while parsing an address in Intel syntax. Use it for improved error checking. 2018-06-22 22:28:39 +00:00
intel-syntax-hex.s [MC] Separate masm integer literal lexer support from inline asm 2018-10-24 20:23:57 +00:00
intel-syntax-invalid-basereg.s
intel-syntax-invalid-scale.s
intel-syntax-print.ll
intel-syntax-ptr-sized.s [X86] Add suffixes to the LGDT/LIDT/SGDT/SIDT mnemonics in Intel syntax. Add aliases based on 16/32-bit mode to choose the default. 2018-04-29 06:24:09 +00:00
intel-syntax-unsized-memory.s
intel-syntax-var-offset.ll
intel-syntax-x86-64-avx.s [X86] Remove some intel syntax aliases on (v)cvtpd2(u)dq, (v)cvtpd2ps, (v)cvt(u)qq2ps. Add 'x' and'y' suffix aliases to masked version of the same in att syntax. 2019-04-29 06:13:41 +00:00
intel-syntax-x86-64-avx512_bf16.s [X86] Move files to correct directories after D60552 2019-05-06 09:24:36 +00:00
intel-syntax-x86-64-avx512_bf16_vl.s [X86] Move files to correct directories after D60552 2019-05-06 09:24:36 +00:00
intel-syntax-x86-64-avx512f_vl.s [X86] Remove some intel syntax aliases on (v)cvtpd2(u)dq, (v)cvtpd2ps, (v)cvt(u)qq2ps. Add 'x' and'y' suffix aliases to masked version of the same in att syntax. 2019-04-29 06:13:41 +00:00
intel-syntax-x86-avx512dq_vl.s [X86] Allow assembly parser to accept x/y/z suffixes on non-memory vfpclassps/pd and on memory forms in intel syntax 2019-05-03 16:15:15 +00:00
intel-syntax-x86-avx512vbmi_vl.s
intel-syntax.s [X86][AsmParser] Ignore "short" even harder in Intel syntax ASM. 2019-05-16 23:27:07 +00:00
invalid-sleb.s Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
invalid_opcode.s
large-bss.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
line-table-sections.s
lit.local.cfg
lwp-x86_64.s
lwp.s
macho-reloc-errors-x86.s
macho-reloc-errors-x86_64.s
macho-uleb.s
mpx-encodings.s [X86] Remove REX.W from 64-bit mode BND instructions. 2018-04-28 06:02:40 +00:00
no-elf-compact-unwind.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
padlock.s [X86] Force VIA PadLock crypto instructions to emit a 0xF3 prefix when they encode to match what GNU as does. 2020-06-11 12:59:21 -07:00
pr22004.s
pr22028.s
pr27884.s [MC] Separate masm integer literal lexer support from inline asm 2018-10-24 20:23:57 +00:00
pr28547.s
pr32530.s [X86][AsmParser] re-introduce 'offset' operator 2019-12-30 14:35:26 -05:00
pr37425.s [MC][X86] Enhance X86 Register expression handling to more closely match GCC. 2018-08-16 16:31:14 +00:00
pr38826.s [X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives. 2018-09-06 02:03:14 +00:00
prefix-padding-32.s [Tests] Add test coverage for prefix selection logic 2020-03-16 17:27:44 -07:00
prefix-padding-64.s [Tests] Add test coverage for prefix selection logic 2020-03-16 17:27:44 -07:00
relax-insn.s
relax-offset.s [MC] Recalculate fragment offsets after relaxation 2020-03-17 14:48:05 -07:00
reloc-directive-elf-32.s [MC][X86] Make .reloc support arbitrary relocation types 2020-03-27 13:33:15 -07:00
reloc-directive-elf-64.s [MC][X86] Make .reloc support arbitrary relocation types 2020-03-27 13:33:15 -07:00
reloc-directive.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
reloc-macho.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
reloc-undef-global.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
ret.s
return-column.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
shuffle-comments.s
signed-coff-pcrel.s
space-err.s
stackmap-nops.ll [X86] Adjust nop emission by compiler to consider target decode limitations 2020-01-11 08:45:17 -08:00
stdcall.s Allow '@' to appear in x86 mingw symbols 2019-08-29 21:15:02 +00:00
tlsdesc-32.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
tlsdesc-64.s [llvm-objdump] Print target address with evaluateMemoryOperandAddress() 2020-04-27 09:43:51 -07:00
unused_reg_var_assign.s [MC] Teach ELFObjectWriter that parse-time variables do not appear in 2019-03-04 19:12:56 +00:00
validate-inst-att.s
validate-inst-intel.s
variant-diagnostics.s
vpclmulqdq.s
x86-16.s [X86] Always use 16-bit displacement in 16-bit mode when there is no base or index register. 2020-09-15 19:31:48 -07:00
x86-32-avx.s [X86] Remove the _alt forms of (V)CMP instructions. Use a combination of custom printing and custom parsing to achieve the same result and more 2019-03-18 17:59:59 +00:00
x86-32-avx512_vp2intersect-intel.s [X86] Add VP2INTERSECT instructions 2019-05-31 02:50:41 +00:00
x86-32-avx512vp2intersect-att.s [X86] Add VP2INTERSECT instructions 2019-05-31 02:50:41 +00:00
x86-32-coverage.s [X86] Add TSXLDTRK instructions. 2020-04-09 13:17:29 +08:00
x86-32-fma3.s
x86-32-ms-inline-asm.s
x86-32.s [X86] Add assembler support for .d32 and .d8 mnemonic suffixes to control displacement size. 2020-08-26 10:45:50 -07:00
x86-64-avx512_bf16-encoding.s [X86] Move files to correct directories after D60552 2019-05-06 09:24:36 +00:00
x86-64-avx512_bf16_vl-encoding.s [X86] Move files to correct directories after D60552 2019-05-06 09:24:36 +00:00
x86-64-avx512_vp2intersect-intel.s [X86] Add VP2INTERSECT instructions 2019-05-31 02:50:41 +00:00
x86-64-avx512bw.s [X86] Add '.s' aliases to the assembler for the various redundant move encodings to match gas and our EVEX instructions. 2018-06-18 05:00:50 +00:00
x86-64-avx512bw_vl.s [X86] Move the 'vmovq.s' and similar assembly strings for EVEX vector moves with reversed operands to InstAliases. 2018-06-18 01:28:05 +00:00
x86-64-avx512cd.s
x86-64-avx512cd_vl.s
x86-64-avx512dq.s [X86] Allow assembly parser to accept x/y/z suffixes on non-memory vfpclassps/pd and on memory forms in intel syntax 2019-05-03 16:15:15 +00:00
x86-64-avx512dq_vl.s [X86] Allow assembly parser to accept x/y/z suffixes on non-memory vfpclassps/pd and on memory forms in intel syntax 2019-05-03 16:15:15 +00:00
x86-64-avx512f_vl.s [X86] Remove some intel syntax aliases on (v)cvtpd2(u)dq, (v)cvtpd2ps, (v)cvt(u)qq2ps. Add 'x' and'y' suffix aliases to masked version of the same in att syntax. 2019-04-29 06:13:41 +00:00
x86-64-avx512pf.s [X86] Teach X86MCodeEmitter to properly encode zmm16-zmm31 as index register to vgatherpf/vscatterpf. 2019-10-14 23:48:24 +00:00
x86-64-avx512vp2intersect-att.s [X86] Add VP2INTERSECT instructions 2019-05-31 02:50:41 +00:00
x86-64-avx512vp2intersectvl-att.s [X86] Add VP2INTERSECT instructions 2019-05-31 02:50:41 +00:00
x86-64-avx512vp2intersectvl-intel.s [X86] Add VP2INTERSECT instructions 2019-05-31 02:50:41 +00:00
x86-64-avx512vpopcntdq.s
x86-64.s [X86] Add assembler support for .d32 and .d8 mnemonic suffixes to control displacement size. 2020-08-26 10:45:50 -07:00
x86-GCC-inline-asm-Y-constraints.ll [X86] Remove support for Y0 constraint as an alias for Yz in inline assembly. 2020-05-06 14:58:53 -07:00
x86-branch-relaxation.s [X86InstPrinter] Change printPCRelImm to print the target address in hexadecimal form 2020-03-26 08:28:59 -07:00
x86-directive-nops-errors.s [X86] support .nops directive 2020-08-03 11:50:56 -07:00
x86-directive-nops.s [X86] support .nops directive 2020-08-03 11:50:56 -07:00
x86-evenDirective.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
x86-itanium.ll
x86-jcxz-loop-fixup.s [X86][MC] no error diagnostic for out-of-range jrcxz/jecxz/jcxz 2019-11-26 14:32:17 +03:00
x86-target-directives.s
x86-windows-itanium-libcalls.ll
x86_64-asm-match.s Move `REQUIRES:` line to the top 2018-06-26 17:44:23 +00:00
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
x86_64-bmi-encoding.s
x86_64-directive-nops.s [X86] support .nops directive 2020-08-03 11:50:56 -07:00
x86_64-encoding.s [X86] Make %eiz usage in 64-bit mode, force a 0x67 address size prefix. Fix some test CHECK lines. 2018-06-23 06:15:04 +00:00
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-hle-encoding.s
x86_64-imm-widths.s
x86_64-rand-encoding.s
x86_64-rtm-encoding.s
x86_64-signed-reloc.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
x86_64-sse4a.s
x86_64-tbm-encoding.s
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s [X86] Add assembler support for {vex} prefix to match GNU as. 2020-05-08 11:50:58 -07:00
x86_long_nop.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
x86_nop.s
x86_operands.s X86AsmParser: Do not process a non-existent token 2019-03-26 03:12:41 +00:00