forked from OSchip/llvm-project
49 lines
1.4 KiB
LLVM
49 lines
1.4 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; CHECK: loop0
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target triple = "hexagon"
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; Function Attrs: nounwind readonly
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define i32 @f0(i8* nocapture %a0, i8* nocapture %a1, i32 %a2) #0 {
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b0:
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%v0 = icmp eq i32 %a2, 0
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br i1 %v0, label %b6, label %b1
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b1: ; preds = %b0
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br label %b2
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b2: ; preds = %b4, %b1
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%v1 = phi i8* [ %v10, %b4 ], [ %a1, %b1 ]
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%v2 = phi i8* [ %v9, %b4 ], [ %a0, %b1 ]
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%v3 = phi i32 [ %v11, %b4 ], [ %a2, %b1 ]
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%v4 = load i8, i8* %v2, align 1, !tbaa !0
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%v5 = load i8, i8* %v1, align 1, !tbaa !0
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%v6 = icmp eq i8 %v4, %v5
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br i1 %v6, label %b4, label %b3
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b3: ; preds = %b2
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%v7 = icmp ult i8 %v4, %v5
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%v8 = select i1 %v7, i32 -1, i32 1
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br label %b6
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b4: ; preds = %b2
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%v9 = getelementptr inbounds i8, i8* %v2, i32 1
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%v10 = getelementptr inbounds i8, i8* %v1, i32 1
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%v11 = add i32 %v3, -1
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%v12 = icmp eq i32 %v11, 0
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br i1 %v12, label %b5, label %b2
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b5: ; preds = %b4
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br label %b6
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b6: ; preds = %b5, %b3, %b0
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%v13 = phi i32 [ %v8, %b3 ], [ 0, %b0 ], [ 0, %b5 ]
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ret i32 %v13
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}
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attributes #0 = { nounwind readonly "target-cpu"="hexagonv55" }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"omnipotent char", !2}
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!2 = !{!"Simple C/C++ TBAA"}
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