forked from OSchip/llvm-project
49 lines
1.6 KiB
LLVM
49 lines
1.6 KiB
LLVM
; RUN: llc -march=hexagon -O3 < %s | FileCheck %s
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; CHECK: }
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; CHECK: [[REG0:r([0-9]+)]] = addasl
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; CHECK: {
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; CHECK: }
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; CHECK: memw([[REG0]]
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target triple = "hexagon"
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@g0 = external global i32
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; Function Attrs: nounwind
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define i32 @f0(i32* nocapture %a0, [50 x i32]* nocapture %a1, i32 %a2, i32 %a3) #0 {
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b0:
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%v0 = add nsw i32 %a2, 5
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%v1 = getelementptr inbounds i32, i32* %a0, i32 %v0
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store i32 %a3, i32* %v1, align 4, !tbaa !0
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%v2 = add nsw i32 %a2, 6
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%v3 = getelementptr inbounds i32, i32* %a0, i32 %v2
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store i32 %a3, i32* %v3, align 4, !tbaa !0
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%v4 = add nsw i32 %a2, 35
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%v5 = getelementptr inbounds i32, i32* %a0, i32 %v4
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store i32 %v0, i32* %v5, align 4, !tbaa !0
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%v6 = getelementptr inbounds [50 x i32], [50 x i32]* %a1, i32 %v0, i32 %v0
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store i32 %v0, i32* %v6, align 4, !tbaa !0
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%v7 = add nsw i32 %a2, 6
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%v8 = getelementptr inbounds [50 x i32], [50 x i32]* %a1, i32 %v0, i32 %v7
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store i32 %v0, i32* %v8, align 4, !tbaa !0
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%v9 = add nsw i32 %a2, 4
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%v10 = getelementptr inbounds [50 x i32], [50 x i32]* %a1, i32 %v0, i32 %v9
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%v11 = load i32, i32* %v10, align 4, !tbaa !0
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%v12 = add nsw i32 %v11, 1
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store i32 %v12, i32* %v10, align 4, !tbaa !0
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%v13 = load i32, i32* %v1, align 4, !tbaa !0
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%v14 = add nsw i32 %a2, 25
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%v15 = getelementptr inbounds [50 x i32], [50 x i32]* %a1, i32 %v14, i32 %v0
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store i32 %v13, i32* %v15, align 4, !tbaa !0
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store i32 5, i32* @g0, align 4, !tbaa !0
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ret i32 undef
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C/C++ TBAA"}
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