forked from OSchip/llvm-project
46 lines
1.9 KiB
LLVM
46 lines
1.9 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX900,CAS %s
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; RUN: llc -march=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX908,CAS %s
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; GCN-LABEL: {{^}}global_atomic_fadd_ret_f32:
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; CAS: [[LOOP:BB[0-9]+_[0-9]+]]
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; CAS: v_add_f32_e32
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; CAS: global_atomic_cmpswap
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; CAS: s_andn2_b64 exec, exec,
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; CAS-NEXT: s_cbranch_execnz [[LOOP]]
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define amdgpu_kernel void @global_atomic_fadd_ret_f32(float addrspace(1)* %ptr) {
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%result = atomicrmw fadd float addrspace(1)* %ptr, float 4.0 seq_cst
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store float %result, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}global_atomic_fadd_noret_f32:
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; GFX900: [[LOOP:BB[0-9]+_[0-9]+]]
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; GFX900: v_add_f32_e32
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; GFX900: global_atomic_cmpswap
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; GFX900: s_andn2_b64 exec, exec,
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; GFX900-NEXT: s_cbranch_execnz [[LOOP]]
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; GFX908-NOT: v_add_f32
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; GFX908: global_atomic_add_f32 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, off
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; GFX908-NOT: s_cbranch_execnz
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define amdgpu_kernel void @global_atomic_fadd_noret_f32(float addrspace(1)* %ptr) {
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%result = atomicrmw fadd float addrspace(1)* %ptr, float 4.0 seq_cst
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ret void
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}
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; Make sure this artificially selects with an incorrect subtarget, but the feature set.
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; GCN-LABEL: {{^}}global_atomic_fadd_ret_f32_wrong_subtarget:
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define amdgpu_kernel void @global_atomic_fadd_ret_f32_wrong_subtarget(float addrspace(1)* %ptr) #0 {
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%result = atomicrmw fadd float addrspace(1)* %ptr, float 4.0 seq_cst
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store float %result, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}global_atomic_fadd_noret_f32_wrong_subtarget:
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define amdgpu_kernel void @global_atomic_fadd_noret_f32_wrong_subtarget(float addrspace(1)* %ptr) #0 {
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%result = atomicrmw fadd float addrspace(1)* %ptr, float 4.0 seq_cst
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ret void
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}
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attributes #0 = { "target-cpu"="gfx803" "target-features"="+atomic-fadd-insts" }
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